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Rev Log message Author Age Path
22 Fix the potato_get_badvaddr() macro skordal 3327d 10h /potato/
21 Upgrade the example design to use a 60 MHz system clock skordal 3327d 11h /potato/
20 Fix SHA256 benchmark crash by storing all registers on exception handler entry

This problem will disappear when the processor is updated to conform to the
new supervisor specification, which will allow us to use a compiler that
conforms to the new "official" ABI.
skordal 3327d 11h /potato/
19 SHA256 benchmark: allow compiler to inline at will skordal 3327d 11h /potato/
18 instr_misalign_check: add do_jump to sensitivity list skordal 3329d 11h /potato/
17 Improve detection of unaligned instructions skordal 3333d 18h /potato/
16 Correct grammar in source code comment skordal 3333d 18h /potato/
15 SHA256 benchmark: fix Makefile syntax error skordal 3340d 11h /potato/
14 Improve detection of invalid instructions skordal 3340d 11h /potato/
13 Add SHA256 benchmark code skordal 3340d 16h /potato/
12 Update example design with correct bug-report URL and testbenches skordal 3340d 18h /potato/
11 Correct FIFO file header skordal 3340d 18h /potato/
10 Add missing FIFO module skordal 3345d 12h /potato/
9 Remove dependency on a non-existent target in the Makefile skordal 3345d 12h /potato/
8 Clarify instruction ROM naming in the example design README skordal 3352d 14h /potato/
7 Add test design for the Nexys 4 board from Digilent skordal 3352d 15h /potato/
6 Add ISA tests skordal 3352d 15h /potato/
5 Update the README, remove .md extension skordal 3354d 20h /potato/
4 Add license skordal 3354d 20h /potato/
3 Fix bug reporting URL skordal 3354d 21h /potato/
2 Initial commit skordal 3354d 23h /potato/
1 The project and the structure was created root 3366d 02h /potato/

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