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Rev Log message Author Age Path
24 Remove unused STRINGIFY macros skordal 3318d 07h /potato/
23 Create branch to use for implementing a cache skordal 3318d 07h /potato/
22 Fix the potato_get_badvaddr() macro skordal 3318d 08h /potato/
21 Upgrade the example design to use a 60 MHz system clock skordal 3318d 08h /potato/
20 Fix SHA256 benchmark crash by storing all registers on exception handler entry

This problem will disappear when the processor is updated to conform to the
new supervisor specification, which will allow us to use a compiler that
conforms to the new "official" ABI.		 skordal 3318d 08h /potato/
19 SHA256 benchmark: allow compiler to inline at will skordal 3318d 08h /potato/
18 instr_misalign_check: add do_jump to sensitivity list skordal 3320d 08h /potato/
17 Improve detection of unaligned instructions skordal 3324d 15h /potato/
16 Correct grammar in source code comment skordal 3324d 15h /potato/
15 SHA256 benchmark: fix Makefile syntax error skordal 3331d 08h /potato/
14 Improve detection of invalid instructions skordal 3331d 09h /potato/
13 Add SHA256 benchmark code skordal 3331d 13h /potato/
12 Update example design with correct bug-report URL and testbenches skordal 3331d 15h /potato/
11 Correct FIFO file header skordal 3331d 16h /potato/
10 Add missing FIFO module skordal 3336d 10h /potato/
9 Remove dependency on a non-existent target in the Makefile skordal 3336d 10h /potato/
8 Clarify instruction ROM naming in the example design README skordal 3343d 12h /potato/
7 Add test design for the Nexys 4 board from Digilent skordal 3343d 12h /potato/
6 Add ISA tests skordal 3343d 12h /potato/
5 Update the README, remove .md extension skordal 3345d 18h /potato/
4 Add license skordal 3345d 18h /potato/
3 Fix bug reporting URL skordal 3345d 18h /potato/
2 Initial commit skordal 3345d 20h /potato/
1 The project and the structure was created root 3356d 23h /potato/

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