URL https://opencores.org/ocsvn/potato/potato/trunk

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[/] [potato/] - Rev 30

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Rev	Log message	Author	Age	Path
30	Add testcase for a combination of instructions that fail when using cache	skordal	3330d 17h	/potato/
29	Add reset functionality for the WB arbiter state machine	skordal	3333d 12h	/potato/
28	Add rudimentary User's manual	skordal	3339d 12h	/potato/
27	Prevent exceptions from being taken while stalling	skordal	3339d 14h	/potato/
26	Prevent exceptions from being taken while stalling Jumping to an exception handler while stalling and waiting for a load/store instruction to finish can cause undefined results from the load/store instruction. This actually fixes the issue mentioned in revision r20.	skordal	3339d 17h	/potato/
25	Add placeholder cache modules and a wishbone arbiter	skordal	3341d 21h	/potato/
24	Remove unused STRINGIFY macros	skordal	3342d 10h	/potato/
23	Create branch to use for implementing a cache	skordal	3342d 10h	/potato/
22	Fix the potato_get_badvaddr() macro	skordal	3342d 11h	/potato/
21	Upgrade the example design to use a 60 MHz system clock	skordal	3342d 11h	/potato/
20	Fix SHA256 benchmark crash by storing all registers on exception handler entry This problem will disappear when the processor is updated to conform to the new supervisor specification, which will allow us to use a compiler that conforms to the new "official" ABI.	skordal	3342d 11h	/potato/
19	SHA256 benchmark: allow compiler to inline at will	skordal	3342d 11h	/potato/
18	instr_misalign_check: add do_jump to sensitivity list	skordal	3344d 11h	/potato/
17	Improve detection of unaligned instructions	skordal	3348d 18h	/potato/
16	Correct grammar in source code comment	skordal	3348d 18h	/potato/
15	SHA256 benchmark: fix Makefile syntax error	skordal	3355d 11h	/potato/
14	Improve detection of invalid instructions	skordal	3355d 12h	/potato/
13	Add SHA256 benchmark code	skordal	3355d 16h	/potato/
12	Update example design with correct bug-report URL and testbenches	skordal	3355d 18h	/potato/
11	Correct FIFO file header	skordal	3355d 19h	/potato/
10	Add missing FIFO module	skordal	3360d 13h	/potato/
9	Remove dependency on a non-existent target in the Makefile	skordal	3360d 13h	/potato/
8	Clarify instruction ROM naming in the example design README	skordal	3367d 15h	/potato/
7	Add test design for the Nexys 4 board from Digilent	skordal	3367d 15h	/potato/
6	Add ISA tests	skordal	3367d 15h	/potato/
5	Update the README, remove .md extension	skordal	3369d 21h	/potato/
4	Add license	skordal	3369d 21h	/potato/
3	Fix bug reporting URL	skordal	3369d 21h	/potato/
2	Initial commit	skordal	3369d 23h	/potato/
1	The project and the structure was created	root	3381d 02h	/potato/

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