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Rev Log message Author Age Path
31 Prevent flushing the pipeline if it is stalling skordal 3316d 07h /potato/
30 Add testcase for a combination of instructions that fail when using cache skordal 3318d 11h /potato/
29 Add reset functionality for the WB arbiter state machine skordal 3321d 06h /potato/
28 Add rudimentary User's manual skordal 3327d 06h /potato/
27 Prevent exceptions from being taken while stalling skordal 3327d 08h /potato/
26 Prevent exceptions from being taken while stalling

Jumping to an exception handler while stalling and waiting for a load/store
instruction to finish can cause undefined results from the load/store
instruction. This actually fixes the issue mentioned in revision r20.
skordal 3327d 11h /potato/
25 Add placeholder cache modules and a wishbone arbiter skordal 3329d 15h /potato/
24 Remove unused STRINGIFY macros skordal 3330d 04h /potato/
23 Create branch to use for implementing a cache skordal 3330d 04h /potato/
22 Fix the potato_get_badvaddr() macro skordal 3330d 05h /potato/
21 Upgrade the example design to use a 60 MHz system clock skordal 3330d 05h /potato/
20 Fix SHA256 benchmark crash by storing all registers on exception handler entry

This problem will disappear when the processor is updated to conform to the
new supervisor specification, which will allow us to use a compiler that
conforms to the new "official" ABI.
skordal 3330d 05h /potato/
19 SHA256 benchmark: allow compiler to inline at will skordal 3330d 05h /potato/
18 instr_misalign_check: add do_jump to sensitivity list skordal 3332d 05h /potato/
17 Improve detection of unaligned instructions skordal 3336d 12h /potato/
16 Correct grammar in source code comment skordal 3336d 12h /potato/
15 SHA256 benchmark: fix Makefile syntax error skordal 3343d 05h /potato/
14 Improve detection of invalid instructions skordal 3343d 06h /potato/
13 Add SHA256 benchmark code skordal 3343d 10h /potato/
12 Update example design with correct bug-report URL and testbenches skordal 3343d 12h /potato/
11 Correct FIFO file header skordal 3343d 12h /potato/
10 Add missing FIFO module skordal 3348d 06h /potato/
9 Remove dependency on a non-existent target in the Makefile skordal 3348d 06h /potato/
8 Clarify instruction ROM naming in the example design README skordal 3355d 09h /potato/
7 Add test design for the Nexys 4 board from Digilent skordal 3355d 09h /potato/
6 Add ISA tests skordal 3355d 09h /potato/
5 Update the README, remove .md extension skordal 3357d 15h /potato/
4 Add license skordal 3357d 15h /potato/
3 Fix bug reporting URL skordal 3357d 15h /potato/
2 Initial commit skordal 3357d 17h /potato/

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