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[/] [potato/] - Rev 43

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Rev	Log message	Author	Age	Path
43	Improve instruction fetch logic	skordal	3300d 18h	/potato/
42	Move check for stall from irq_asserted to exception_taken in EX stage	skordal	3300d 18h	/potato/
41	Make continouous status register reads asynchronous	skordal	3300d 18h	/potato/
40	Reduce example design clock frequency to 50 MHz - Also includes a minor change to make the address decoder/interconnect work better with burst transfers.	skordal	3300d 18h	/potato/
39	Disable IRQs when handling exceptions	skordal	3300d 19h	/potato/
38	Add "Hello World" test application	skordal	3300d 20h	/potato/
37	Add macro to set the TOHOST register from C code	skordal	3300d 20h	/potato/
36	Ensure correct read of CSR after stall	skordal	3300d 20h	/potato/
35	Prevent jumping/branching when stalling	skordal	3300d 20h	/potato/
34	Prevent flushing the pipeline if it is stalling	skordal	3300d 20h	/potato/
33	Ensure correct read of CSR after stall	skordal	3300d 20h	/potato/
32	Prevent jumping/branching when stalling	skordal	3303d 17h	/potato/
31	Prevent flushing the pipeline if it is stalling	skordal	3303d 18h	/potato/
30	Add testcase for a combination of instructions that fail when using cache	skordal	3305d 23h	/potato/
29	Add reset functionality for the WB arbiter state machine	skordal	3308d 18h	/potato/
28	Add rudimentary User's manual	skordal	3314d 17h	/potato/
27	Prevent exceptions from being taken while stalling	skordal	3314d 19h	/potato/
26	Prevent exceptions from being taken while stalling Jumping to an exception handler while stalling and waiting for a load/store instruction to finish can cause undefined results from the load/store instruction. This actually fixes the issue mentioned in revision r20.	skordal	3314d 22h	/potato/
25	Add placeholder cache modules and a wishbone arbiter	skordal	3317d 03h	/potato/
24	Remove unused STRINGIFY macros	skordal	3317d 16h	/potato/
23	Create branch to use for implementing a cache	skordal	3317d 16h	/potato/
22	Fix the potato_get_badvaddr() macro	skordal	3317d 16h	/potato/
21	Upgrade the example design to use a 60 MHz system clock	skordal	3317d 17h	/potato/
20	Fix SHA256 benchmark crash by storing all registers on exception handler entry This problem will disappear when the processor is updated to conform to the new supervisor specification, which will allow us to use a compiler that conforms to the new "official" ABI.	skordal	3317d 17h	/potato/
19	SHA256 benchmark: allow compiler to inline at will	skordal	3317d 17h	/potato/
18	instr_misalign_check: add do_jump to sensitivity list	skordal	3319d 17h	/potato/
17	Improve detection of unaligned instructions	skordal	3323d 23h	/potato/
16	Correct grammar in source code comment	skordal	3324d 00h	/potato/
15	SHA256 benchmark: fix Makefile syntax error	skordal	3330d 16h	/potato/
14	Improve detection of invalid instructions	skordal	3330d 17h	/potato/

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[/] [potato/] - Rev 43

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