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Rev Log message Author Age Path
49 Correct spelling of "privileged" skordal 3301d 19h /potato/
48 Create branch for upgrading to the new privileged ISA skordal 3301d 19h /potato/
47 Tag version 0.1 of the Potato Processor skordal 3302d 02h /potato/
46 Remove branch: cache-playground skordal 3304d 20h /potato/
45 Merge branch cache-playground (r23-r30 and r34-r44) into trunk

This primarily adds the following features the the processor:
- A direct-mapped instruction cache with configurable cache line width and
number of cache lines.
- Various bug fixes for bugs that appeared when the processor could run
instructions at full speed but had to stall for data.
- A "Hello World" test application.		 skordal 3304d 20h /potato/
44 Add instruction cache and use the WB adapter as dmem interface skordal 3304d 21h /potato/
43 Improve instruction fetch logic skordal 3304d 21h /potato/
42 Move check for stall from irq_asserted to exception_taken in EX stage skordal 3304d 21h /potato/
41 Make continouous status register reads asynchronous skordal 3304d 21h /potato/
40 Reduce example design clock frequency to 50 MHz

- Also includes a minor change to make the address decoder/interconnect work
better with burst transfers.		 skordal 3304d 21h /potato/
39 Disable IRQs when handling exceptions skordal 3304d 21h /potato/
38 Add "Hello World" test application skordal 3304d 22h /potato/
37 Add macro to set the TOHOST register from C code skordal 3304d 22h /potato/
36 Ensure correct read of CSR after stall skordal 3304d 22h /potato/
35 Prevent jumping/branching when stalling skordal 3304d 22h /potato/
34 Prevent flushing the pipeline if it is stalling skordal 3304d 22h /potato/
33 Ensure correct read of CSR after stall skordal 3304d 22h /potato/
32 Prevent jumping/branching when stalling skordal 3307d 20h /potato/
31 Prevent flushing the pipeline if it is stalling skordal 3307d 21h /potato/
30 Add testcase for a combination of instructions that fail when using cache skordal 3310d 01h /potato/
29 Add reset functionality for the WB arbiter state machine skordal 3312d 20h /potato/
28 Add rudimentary User's manual skordal 3318d 20h /potato/
27 Prevent exceptions from being taken while stalling skordal 3318d 22h /potato/
26 Prevent exceptions from being taken while stalling

Jumping to an exception handler while stalling and waiting for a load/store
instruction to finish can cause undefined results from the load/store
instruction. This actually fixes the issue mentioned in revision r20.		 skordal 3319d 00h /potato/
25 Add placeholder cache modules and a wishbone arbiter skordal 3321d 05h /potato/
24 Remove unused STRINGIFY macros skordal 3321d 18h /potato/
23 Create branch to use for implementing a cache skordal 3321d 18h /potato/
22 Fix the potato_get_badvaddr() macro skordal 3321d 19h /potato/
21 Upgrade the example design to use a 60 MHz system clock skordal 3321d 19h /potato/
20 Fix SHA256 benchmark crash by storing all registers on exception handler entry

This problem will disappear when the processor is updated to conform to the
new supervisor specification, which will allow us to use a compiler that
conforms to the new "official" ABI.		 skordal 3321d 19h /potato/

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