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Rev Log message Author Age Path
47 Tag version 0.1 of the Potato Processor skordal 3336d 03h /potato/tags/v0.1/
45 Merge branch cache-playground (r23-r30 and r34-r44) into trunk

This primarily adds the following features the the processor:
- A direct-mapped instruction cache with configurable cache line width and
number of cache lines.
- Various bug fixes for bugs that appeared when the processor could run
instructions at full speed but had to stall for data.
- A "Hello World" test application.		 skordal 3338d 21h /potato/trunk/
36 Ensure correct read of CSR after stall skordal 3338d 23h /potato/trunk/
35 Prevent jumping/branching when stalling skordal 3338d 23h /potato/trunk/
34 Prevent flushing the pipeline if it is stalling skordal 3338d 23h /potato/trunk/
28 Add rudimentary User's manual skordal 3352d 21h /potato/trunk/
26 Prevent exceptions from being taken while stalling

Jumping to an exception handler while stalling and waiting for a load/store
instruction to finish can cause undefined results from the load/store
instruction. This actually fixes the issue mentioned in revision r20.		 skordal 3353d 01h /potato/trunk/
24 Remove unused STRINGIFY macros skordal 3355d 19h /potato/trunk/
22 Fix the potato_get_badvaddr() macro skordal 3355d 20h /potato/trunk/
21 Upgrade the example design to use a 60 MHz system clock skordal 3355d 20h /potato/trunk/
20 Fix SHA256 benchmark crash by storing all registers on exception handler entry

This problem will disappear when the processor is updated to conform to the
new supervisor specification, which will allow us to use a compiler that
conforms to the new "official" ABI.		 skordal 3355d 20h /potato/trunk/
19 SHA256 benchmark: allow compiler to inline at will skordal 3355d 20h /potato/trunk/
18 instr_misalign_check: add do_jump to sensitivity list skordal 3357d 20h /potato/trunk/
17 Improve detection of unaligned instructions skordal 3362d 03h /potato/trunk/
16 Correct grammar in source code comment skordal 3362d 03h /potato/trunk/
15 SHA256 benchmark: fix Makefile syntax error skordal 3368d 20h /potato/trunk/
14 Improve detection of invalid instructions skordal 3368d 20h /potato/trunk/
13 Add SHA256 benchmark code skordal 3369d 01h /potato/trunk/
12 Update example design with correct bug-report URL and testbenches skordal 3369d 03h /potato/trunk/
11 Correct FIFO file header skordal 3369d 03h /potato/trunk/
10 Add missing FIFO module skordal 3373d 21h /potato/trunk/
9 Remove dependency on a non-existent target in the Makefile skordal 3373d 21h /potato/trunk/
8 Clarify instruction ROM naming in the example design README skordal 3380d 23h /potato/trunk/
7 Add test design for the Nexys 4 board from Digilent skordal 3381d 00h /potato/trunk/
6 Add ISA tests skordal 3381d 00h /potato/trunk/
5 Update the README, remove .md extension skordal 3383d 05h /potato/trunk/
4 Add license skordal 3383d 05h /potato/trunk/
3 Fix bug reporting URL skordal 3383d 06h /potato/trunk/
2 Initial commit skordal 3383d 08h /potato/trunk/
1 The project and the structure was created root 3394d 11h /potato/trunk/

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