| Rev |
Log message |
Author |
Age |
Path |
| 202 |
Working towards a DMA oriented RayTRac |
jguarin2002 |
4364d 22h |
/raytrac/ |
| 201 |
files no longer needed im.vhd and fadd32long.vhd |
jguarin2002 |
4364d 23h |
/raytrac/ |
| 200 |
raytrac_control.vhd: rtl that describes, the raytrac control registers, the avalaon memory mapped slave interface, the avalon memory mapped master interface, the controlling state machine, the input and output buffers |
jguarin2002 |
4364d 23h |
/raytrac/ |
| 199 |
Check out in the design document for changes made on Load logic, a load chain has been added to Memblock I/O and several memory blocks were removed, under construction, this version WONT in any means work |
jguarin2002 |
4381d 04h |
/raytrac/ |
| 198 |
Check out for the best out for the best organization so the datapath does not consume to many logic cells |
jguarin2002 |
4381d 04h |
/raytrac/ |
| 197 |
Chnages on interconnectivity: Check out the SGDMA Sheets |
jguarin2002 |
4391d 06h |
/raytrac/ |
| 196 |
raytrac+sg_dma+raytrac. Step One, the DPC is transformed. Now there are five instructions (check the design document), theres no full queue sync event, there are only four result queues and only 3 add fp 32 b adders rather than 4. Even it seems like a reduction has taken place, decodification efforts take place when decoding multiplexation from arithmetic blocks towards the resulting queues |
jguarin2002 |
4394d 17h |
/raytrac/ |
| 195 |
Document advance and changes in the design |
jguarin2002 |
4397d 14h |
/raytrac/ |
| 194 |
Work In Progress |
jguarin2002 |
4412d 19h |
/raytrac/ |
| 193 |
WIP: Main Document |
jguarin2002 |
4413d 17h |
/raytrac/ |
| 192 |
Some change I dont realize what is it in the design document (xls) |
jguarin2002 |
4414d 04h |
/raytrac/ |
| 191 |
Reduced the implementation of Instruction Queue to 16 instructions rather than 32 and using registers in logic cells rather than M9Ks memory blocks.... finally the design fits. |
jguarin2002 |
4414d 04h |
/raytrac/ |
| 190 |
M9K Block reduction. And Altera Compiler Directive was added to adder code to prevent unnecesary M9K block inferring... |
jguarin2002 |
4418d 12h |
/raytrac/ |
| 189 |
Limiting Block size on the operands register to a maximum of 256 |
jguarin2002 |
4418d 19h |
/raytrac/ |
| 188 |
Fitting Report |
jguarin2002 |
4420d 02h |
/raytrac/ |
| 187 |
Sopc claims that int is a name that conflicts with verilog or vhdl standards, so a change on the int port was made by renaming it to irq |
jguarin2002 |
4420d 02h |
/raytrac/ |
| 186 |
Sopc claims that int is a name that conflicts with verilog or vhdl standards, so a change on the int port was made by renaming it to irq |
jguarin2002 |
4420d 02h |
/raytrac/ |
| 185 |
Well mulblock was a void inside file.... |
jguarin2002 |
4420d 16h |
/raytrac/ |
| 184 |
Se quitó la palabra capítulo de los titulos de los capítulos. |
jguarin2002 |
4420d 20h |
/raytrac/ |
| 183 |
Se quitó la palabra capítulo de los titulos de los capítulos. |
jguarin2002 |
4420d 20h |
/raytrac/ |
| 182 |
Sobre la sincronización del RayTrac al escribir instrucciones y operandos. Pagina 29 y 31. |
jguarin2002 |
4420d 21h |
/raytrac/ |
| 181 |
Version beta 0.2 previo a conexion con bus avalon en QSYS/SOPC |
jguarin2002 |
4421d 04h |
/raytrac/ |
| 180 |
Documentos de diseño y documento final |
jguarin2002 |
4421d 04h |
/raytrac/ |
| 179 |
light change on code readbility for Datapath Control hardware description hdl file |
jguarin2002 |
4422d 01h |
/raytrac/ |
| 178 |
QSYS SOPC Raytrac component.... |
jguarin2002 |
4445d 16h |
/raytrac/ |
| 177 |
Interruptions separated in diferent output ports, so we can assign them as interruptions senders.... each one of them..... |
jguarin2002 |
4445d 16h |
/raytrac/ |
| 176 |
Little changes on full result queue signals codification in order to fix a potential bug that havent beed detected at the time of the change in the code |
jguarin2002 |
4457d 14h |
/raytrac/ |
| 175 |
Fixed a problem on the writing signal of results queue 5,6 and 7. The error was detected just right when a calculated normalized vector was about to be written in the results queues 5 6 and 7 and the write signals of those were not activated (it would remain in 0), after checking what was the problem, a codification bug was spotted. |
jguarin2002 |
4457d 14h |
/raytrac/ |
| 174 |
Comment tweaking... its the same RTL anyway |
jguarin2002 |
4457d 15h |
/raytrac/ |
| 173 |
Added a procedure to support vectorblock03 type variables rendering after testbench execution |
jguarin2002 |
4457d 15h |
/raytrac/ |
