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[/] [rise/] [trunk/] - Rev 149

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Rev Log message Author Age Path
148 New directory structure. root 5679d 09h /rise/trunk/
147 - Updated to use current example. cwalter 6453d 17h /trunk/
146 - Changed to compile UART example. cwalter 6453d 19h /trunk/
145 - Added more VHDL files to project. cwalter 6453d 19h /trunk/
144 - IF stage now uses autogenerated VHDL files. cwalter 6453d 19h /trunk/
143 - Added more complex UART example. cwalter 6453d 19h /trunk/
142 - Added gap between characters sent and changed last character to CR. cwalter 6453d 19h /trunk/
141 - Added delay between characters. cwalter 6453d 20h /trunk/
140 - Test bench for RISE with UART. cwalter 6453d 20h /trunk/
139 - Added makefile example to improve design flow.
- Added subroutine example.		 cwalter 6453d 20h /trunk/
138 - Fixed binary to VHDL converter. cwalter 6453d 21h /trunk/
137 - Added binary to VHDL converter. cwalter 6453d 21h /trunk/
136 - Added makefile example to improve design flow.
- Added subroutine example.		 cwalter 6453d 21h /trunk/
135 uart_address_0 was a latch -> changed ustadler 6454d 17h /trunk/
134 Added second test program for testing uart. jlechner 6454d 17h /trunk/
133 - Fixed bug with ST opcodes. cwalter 6454d 19h /trunk/
132 Added test program for testing uart. jlechner 6454d 19h /trunk/
131 Changed high active resets to low active ones. jlechner 6454d 19h /trunk/
130 Removed obsolete line jlechner 6454d 20h /trunk/
129 Sample assembler program for accessing uart jlechner 6454d 20h /trunk/
128 Added multiplexer for output data. This mutliplexer decides on the adress of the last cycles
if ordinary memory data or data of an extension module have to be passed on.		 jlechner 6454d 20h /trunk/
127 Changed high active resets to low active ones. jlechner 6454d 20h /trunk/
126 Added constant for cpu frequency (needed for UART) trinklhar 6455d 02h /trunk/
125 Fixed vhdl bugs trinklhar 6455d 02h /trunk/
124 Assigned UART signals to ports on top-level entity trinklhar 6455d 02h /trunk/
123 Removed UART again trinklhar 6455d 03h /trunk/
122 Removed UART again again trinklhar 6455d 03h /trunk/
121 Added address constants for uart access (memory mapped I/O) trinklhar 6455d 03h /trunk/
120 Added UART module to memory entity trinklhar 6455d 03h /trunk/
119 Uart wieder ausgebaut trinklhar 6455d 22h /trunk/

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