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[/] [s1_core/] [trunk/] - Rev 43

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Rev Log message Author Age Path
43 Added welcome message as a remainder to set paths for tools!=IVerilog fafa1971 6337d 12h /s1_core/trunk/
42 Added support for filelist for Xilinx ISE XST synthesis fafa1971 6337d 12h /s1_core/trunk/
41 Added copy of empty modules upon original SPARC copies fafa1971 6337d 12h /s1_core/trunk/
40 First version of synthesis script for Xilinx ISE XST fafa1971 6337d 12h /s1_core/trunk/
39 Empty modules for cacheless Simply RISC S1 Core fafa1971 6337d 12h /s1_core/trunk/
38 Changed to compile (for now) the boot code. fafa1971 6341d 11h /s1_core/trunk/
37 Memory image coming from the new boot.s fafa1971 6341d 11h /s1_core/trunk/
36 Working boot code!!! fafa1971 6341d 11h /s1_core/trunk/
35 Fixed Assembly comments ("//" had to become "!!"). fafa1971 6341d 12h /s1_core/trunk/
34 This file is useless. fafa1971 6350d 20h /s1_core/trunk/
33 Added inclusion of defines.h in boot.s fafa1971 6351d 11h /s1_core/trunk/
32 First version of cutdown boot code for SPARC V9. fafa1971 6351d 12h /s1_core/trunk/
31 Removed list of formerly dirty signals, to improve waveforms readability. fafa1971 6351d 14h /s1_core/trunk/
30 Added comment for 8 stores to Interrupt Queue Registers that have been removed. fafa1971 6351d 14h /s1_core/trunk/
29 Removed closed bug from todolist. fafa1971 6351d 14h /s1_core/trunk/
28 Before it was empty (getting NOPs by default), now it is the same as the one in
the official OpenSPARC T1 verification environment (mem_RED_EXT_SEC.image_ORIGINAL)
and I just had to remove 8 stores to Interrupt Queues Registers.		 fafa1971 6351d 14h /s1_core/trunk/
27 Added "tee" to see output both on screen and saved in the logfile. fafa1971 6351d 15h /s1_core/trunk/
26 Added "tee" commands to see the output both on screen and saved on logfile. fafa1971 6351d 15h /s1_core/trunk/
25 Updated filelists according to the new OpenSPARC 1.4, and add some minor
changes like Stephen Williams's suggestion to use $(S1_ROOT) in the filelists
for Icarus Verilog (he's the author!).		 fafa1971 6351d 15h /s1_core/trunk/
24 Fresh files taken from most recent OpenSPARC 1.4. fafa1971 6351d 15h /s1_core/trunk/
23 Fresh file taken from the most recent OpenSPARC 1.4. fafa1971 6351d 15h /s1_core/trunk/
22 Removed files of OpenSPARC 1.3 to later add the 1.4 ones. fafa1971 6351d 15h /s1_core/trunk/
21 Removed files of OpenSPARC 1.3 to later add version 1.4 ones. fafa1971 6351d 15h /s1_core/trunk/
20 Removed all the files of OpenSPARC 1.3 to later add the 1.4 ones. fafa1971 6351d 15h /s1_core/trunk/
19 *** empty log message *** fafa1971 6351d 16h /s1_core/trunk/
18 Changed S1_ROOT to work in home dir, and T1_ROOT to remove version number. fafa1971 6351d 16h /s1_core/trunk/
17 Added reference to original OpenSPARC boot code source file. fafa1971 6351d 21h /s1_core/trunk/
16 Added the 3 new defines to make the design:
- synthesizable for FPGA
- single-threaded
- without the cryptographic SPU unit		 fafa1971 6352d 02h /s1_core/trunk/
15 Removed the remove of CVS subdirs... fafa1971 6352d 02h /s1_core/trunk/
14 Now the ACCESSES file perfectly documents the list of instructions fetched
both by the T1 and the S1, and the difference is shown.
To obtain the disassembled code the "disass" tool (under tools/opt) has
been used.		 fafa1971 6402d 18h /s1_core/trunk/

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