OpenCores
URL https://opencores.org/ocsvn/s1_core/s1_core/trunk

Subversion Repositories s1_core

[/] [s1_core/] [trunk/] - Rev 73

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
73 New version of scripts for DC and to compile boot code fafa1971 6075d 02h /s1_core/trunk/
72 Modified RAM address from 0x400C0 to 0x4C000 fafa1971 6081d 09h /s1_core/trunk/
71 Added check for S1_ROOT set (suggested by lain.ux) fafa1971 6082d 09h /s1_core/trunk/
70 Again, the setup file is linked rather than copied fafa1971 6089d 18h /s1_core/trunk/
69 Now contains also the other file fafa1971 6089d 18h /s1_core/trunk/
68 Merged with the DC setup file fafa1971 6089d 18h /s1_core/trunk/
67 Now uses XG/Tcl syntax fafa1971 6091d 18h /s1_core/trunk/
66 Modified to use XG syntax fafa1971 6091d 18h /s1_core/trunk/
65 Version with undisclosed library names fafa1971 6091d 18h /s1_core/trunk/
64 Initial version
B
C
C
Initial versioNCVS: ----------------------------------------------------------------------		 fafa1971 6091d 18h /s1_core/trunk/
63 *** empty log message *** fafa1971 6091d 18h /s1_core/trunk/
62 Documentation files updated to reflect the 3 different flavors of S1 Core fafa1971 6137d 16h /s1_core/trunk/
61 Updated to latest version fafa1971 6137d 17h /s1_core/trunk/
60 Now supports also Virtex5 devices fafa1971 6137d 17h /s1_core/trunk/
59 Now it is just one line fafa1971 6137d 17h /s1_core/trunk/
58 These were only symbolic links to remember where such these things were defined fafa1971 6137d 17h /s1_core/trunk/
57 Latest version fafa1971 6137d 17h /s1_core/trunk/
56 Updated from OpenSPARC T1 version 1.4 to version 1.5 fafa1971 6137d 17h /s1_core/trunk/
55 Nobody remembers why these blackboxed files were required! fafa1971 6137d 17h /s1_core/trunk/
54 Updated filelists fafa1971 6137d 17h /s1_core/trunk/
53 Removed from CVS tree because header file preprocessing is done elsewhere fafa1971 6137d 17h /s1_core/trunk/
52 Updated SPARC Core files from OpenSPARC T1 version 1.4 to version 1.5 fafa1971 6137d 17h /s1_core/trunk/
51 User Chris "gaterocket" corrected a couple of errors for FPGA boards: blocking assignments and two uninitialized variables. fafa1971 6223d 17h /s1_core/trunk/
50 Changed library paths for XST from macrocell to behav. fafa1971 6240d 00h /s1_core/trunk/
49 Now supports 3 versions: S1 Core ME/SE/EE. fafa1971 6247d 01h /s1_core/trunk/
48 Updated with new OpenSPARC 1.4 list fafa1971 6288d 16h /s1_core/trunk/
47 Updated with `define preprocessing for Xilinx XST synthesis fafa1971 6288d 16h /s1_core/trunk/
46 Fresh version from OpenSPARC 1.4 and Icarus define preprocessing fafa1971 6288d 16h /s1_core/trunk/
45 I'm going to remove original OpenSPARC 1.4 files so that I can insert again
the ones with Icarus Verilog preprocessor already applied by update_sparccore
(it seems that Xilinx's XST does NOT support defines at compile time)		 fafa1971 6288d 16h /s1_core/trunk/
44 Embedded `defines into Verilog source since did not find command line option for XST fafa1971 6289d 14h /s1_core/trunk/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.