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[/] [s1_core/] [trunk/] [hdl/] - Rev 113

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Rev Log message Author Age Path
113 S1_Core: Attempt to merge some long time changes Fab had on his backups. albert.watson 2606d 12h /s1_core/trunk/hdl/
111 albert.watson 4399d 09h /s1_core/trunk/hdl/
105 New directory structure. root 5586d 18h /s1_core/trunk/hdl/
103 Changed almost everything to make our boot code work. fafa1971 5683d 15h /trunk/hdl/
99 This bridge follows the rules stated in paragraph 6.8 of book "OpenSPARC Internals"
in order to stall all the threads while serving a single request.		 fafa1971 5689d 05h /trunk/hdl/
98 Added stall/resume signals from bridge to SPARC Core. fafa1971 5689d 06h /trunk/hdl/
96 File lists with updated SPARC Core code. fafa1971 5704d 11h /trunk/hdl/
95 Files from OpenSPARCT1.1.6 with the SPU instance removed from the sparc.v top-level. fafa1971 5704d 11h /trunk/hdl/
94 Removed files with dependencies from the SPU. fafa1971 5704d 11h /trunk/hdl/
91 Filelists updated according to preprocessed files from OpenSPARC T1 1.6 fafa1971 5808d 05h /trunk/hdl/
90 Added newer files from OpenSPARC T1 1.6 preprocessed with "update_sparccore -ee" fafa1971 5808d 05h /trunk/hdl/
89 Removed files originated from OpenSPARC T1 Design 1.5 preprocessed with "update_sparccore -me" fafa1971 5808d 05h /trunk/hdl/
82 DC synthesis script modified according to the fabolous manual (RTFM...). fafa1971 5969d 12h /trunk/hdl/
81 Sorry, I made a mistake in the waveform of the clock! fafa1971 5969d 15h /trunk/hdl/
79 Relaxed timing, added flatten and hyerarchical report_area. fafa1971 5972d 11h /trunk/hdl/
75 Changed preprocessing for DC synthesis fafa1971 6072d 12h /trunk/hdl/
74 Updated filelists. fafa1971 6072d 12h /trunk/hdl/
73 New version of scripts for DC and to compile boot code fafa1971 6072d 13h /trunk/hdl/
58 These were only symbolic links to remember where such these things were defined fafa1971 6135d 04h /trunk/hdl/
57 Latest version fafa1971 6135d 04h /trunk/hdl/
56 Updated from OpenSPARC T1 version 1.4 to version 1.5 fafa1971 6135d 04h /trunk/hdl/
55 Nobody remembers why these blackboxed files were required! fafa1971 6135d 04h /trunk/hdl/
54 Updated filelists fafa1971 6135d 04h /trunk/hdl/
53 Removed from CVS tree because header file preprocessing is done elsewhere fafa1971 6135d 04h /trunk/hdl/
52 Updated SPARC Core files from OpenSPARC T1 version 1.4 to version 1.5 fafa1971 6135d 04h /trunk/hdl/
51 User Chris "gaterocket" corrected a couple of errors for FPGA boards: blocking assignments and two uninitialized variables. fafa1971 6221d 04h /trunk/hdl/
48 Updated with new OpenSPARC 1.4 list fafa1971 6286d 03h /trunk/hdl/
46 Fresh version from OpenSPARC 1.4 and Icarus define preprocessing fafa1971 6286d 03h /trunk/hdl/
45 I'm going to remove original OpenSPARC 1.4 files so that I can insert again
the ones with Icarus Verilog preprocessor already applied by update_sparccore
(it seems that Xilinx's XST does NOT support defines at compile time)		 fafa1971 6286d 03h /trunk/hdl/
44 Embedded `defines into Verilog source since did not find command line option for XST fafa1971 6287d 01h /trunk/hdl/

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