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[/] [s1_core/] [trunk/] [tools/] [src/] - Rev 110

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Rev Log message Author Age Path
105 New directory structure. root 5584d 10h /s1_core/trunk/tools/src/
103 Changed almost everything to make our boot code work. fafa1971 5681d 07h /s1_core/trunk/tools/src/
100 SPU removed by hand. fafa1971 5686d 05h /s1_core/trunk/tools/src/
92 Added top-level of SPARC Core with SPU section removed (will be copied by update_sparccore). fafa1971 5702d 04h /s1_core/trunk/tools/src/
85 GREAT synthesis script!!! Performs all bottom-up synthesis without errors. fafa1971 5949d 06h /s1_core/trunk/tools/src/
84 Again, used module names instead than instance names in bottom-up synthesis approach. fafa1971 5949d 09h /s1_core/trunk/tools/src/
83 Decreased clock frequency from 250 to 200 MHz. fafa1971 5956d 05h /s1_core/trunk/tools/src/
82 DC synthesis script modified according to the fabolous manual (RTFM...). fafa1971 5967d 05h /s1_core/trunk/tools/src/
81 Sorry, I made a mistake in the waveform of the clock! fafa1971 5967d 08h /s1_core/trunk/tools/src/
80 Hyerarchical report_area. fafa1971 5970d 04h /s1_core/trunk/tools/src/
78 Relaxed timing and added flatten command. fafa1971 5970d 04h /s1_core/trunk/tools/src/
76 Changed again from DB export to DDC export fafa1971 6070d 01h /s1_core/trunk/tools/src/
73 New version of scripts for DC and to compile boot code fafa1971 6070d 06h /s1_core/trunk/tools/src/
72 Modified RAM address from 0x400C0 to 0x4C000 fafa1971 6076d 12h /s1_core/trunk/tools/src/
69 Now contains also the other file fafa1971 6084d 22h /s1_core/trunk/tools/src/
68 Merged with the DC setup file fafa1971 6084d 22h /s1_core/trunk/tools/src/
66 Modified to use XG syntax fafa1971 6086d 22h /s1_core/trunk/tools/src/
65 Version with undisclosed library names fafa1971 6086d 22h /s1_core/trunk/tools/src/
64 Initial version
B
C
C
Initial versioNCVS: ----------------------------------------------------------------------		 fafa1971 6086d 22h /s1_core/trunk/tools/src/
63 *** empty log message *** fafa1971 6086d 22h /s1_core/trunk/tools/src/
60 Now supports also Virtex5 devices fafa1971 6132d 20h /s1_core/trunk/tools/src/
40 First version of synthesis script for Xilinx ISE XST fafa1971 6284d 18h /s1_core/trunk/tools/src/
39 Empty modules for cacheless Simply RISC S1 Core fafa1971 6284d 18h /s1_core/trunk/tools/src/
31 Removed list of formerly dirty signals, to improve waveforms readability. fafa1971 6298d 19h /s1_core/trunk/tools/src/
7 First version. fafa1971 6380d 17h /s1_core/trunk/tools/src/

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