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[/] [sdcard_mass_storage_controller/] [trunk/] [rtl/] [sdc_dma/] - Rev 136

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Rev Log message Author Age Path
136 Updated.
1. SD-model uppdated.
2. Data transaction completion only when BD que is empty
3. Card detect with debounce added to Normal_isr register bit, [1][2]
4. Reset logic change, should be synthesizable in altera and xilinx devices, without need of modifications		 tac2 5001d 15h /sdcard_mass_storage_controller/trunk/rtl/sdc_dma/
134 Uppdate of project, filenames no mix of uppercase and lowercase.
No subfolder for the fifo.		 tac2 5001d 17h /sdcard_mass_storage_controller/trunk/rtl/sdc_dma/
133 Major uppdate of project, rename old files and restructure the folders tac2 5001d 17h /sdcard_mass_storage_controller/trunk/rtl/sdc_dma/
127 tac2 5191d 18h /sdcard_mass_storage_controller/trunk/rtl/sdc_dma/
124 tac2 5459d 12h /sdcard_mass_storage_controller/trunk/rtl/sdc_dma/
123 tac2 5459d 13h /sdcard_mass_storage_controller/trunk/rtl/sdc_dma/
122 Added big endian to data_host.
Serial_host now reset word_cnt		 tac2 5459d 14h /sdcard_mass_storage_controller/trunk/rtl/sdc_dma/
121 Big endianes and Lite endian switched tac2 5459d 14h /sdcard_mass_storage_controller/trunk/rtl/sdc_dma/
120 RAM_WIDTH_32 Support added tac2 5459d 17h /sdcard_mass_storage_controller/trunk/rtl/sdc_dma/
119 Word select fixed tac2 5467d 20h /sdcard_mass_storage_controller/trunk/rtl/sdc_dma/
118 interupt generation corrected with a Or reduction tac2 5468d 06h /sdcard_mass_storage_controller/trunk/rtl/sdc_dma/
117 tac2 5471d 14h /sdcard_mass_storage_controller/trunk/rtl/sdc_dma/
116 tac2 5472d 17h /sdcard_mass_storage_controller/trunk/rtl/sdc_dma/
115 tac2 5472d 18h /sdcard_mass_storage_controller/trunk/rtl/sdc_dma/
111 Uppdate to follow design 0.2
Added license information header		 tac2 5528d 05h /sdcard_mass_storage_controller/trunk/rtl/sdc_dma/
108 Updated to Design document v.02 tac2 5528d 06h /sdcard_mass_storage_controller/trunk/rtl/sdc_dma/
107 Uppdated to Design document v.02
WB and and WB accessed register handled here instead on top level.		 tac2 5528d 06h /sdcard_mass_storage_controller/trunk/rtl/sdc_dma/
106 Uppdated to Design document v.02
Added block name		 tac2 5528d 06h /sdcard_mass_storage_controller/trunk/rtl/sdc_dma/
105 Updated to Design document v.02
Moved CMD_SERIAL_HOST.v module to be instantiated in sd_controler.top		 tac2 5528d 06h /sdcard_mass_storage_controller/trunk/rtl/sdc_dma/
104 tac2 5528d 06h /sdcard_mass_storage_controller/trunk/rtl/sdc_dma/
103 Uppdated to Design document v.02
Removed Output "New_BD"		 tac2 5528d 06h /sdcard_mass_storage_controller/trunk/rtl/sdc_dma/
64 tac2 5540d 05h /sdcard_mass_storage_controller/trunk/rtl/sdc_dma/
63 added support for changing clock divider in software tac2 5540d 05h /sdcard_mass_storage_controller/trunk/rtl/sdc_dma/
62 tac2 5540d 05h /sdcard_mass_storage_controller/trunk/rtl/sdc_dma/
61 added flipflop for 2 signals when crossing clockdomain tac2 5540d 05h /sdcard_mass_storage_controller/trunk/rtl/sdc_dma/
60 added flipflop for transm_complete to reduce chanse for metastable state tac2 5540d 05h /sdcard_mass_storage_controller/trunk/rtl/sdc_dma/
59 Uppdate module name to SD_x tac2 5540d 05h /sdcard_mass_storage_controller/trunk/rtl/sdc_dma/
58 Comments added tac2 5541d 19h /sdcard_mass_storage_controller/trunk/rtl/sdc_dma/
57 tac2 5541d 19h /sdcard_mass_storage_controller/trunk/rtl/sdc_dma/
39 32 bit data width in TX fifo tac2 5543d 06h /sdcard_mass_storage_controller/trunk/rtl/sdc_dma/

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