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[/] [sdhc-sc-core/] [trunk/] [src/] [grpSd/] - Rev 116

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Rev Log message Author Age Path
116 Wishbone interface for sd core started rkastl 4948d 10h /sdhc-sc-core/trunk/src/grpSd/
114 Read works with model too. rkastl 4948d 10h /sdhc-sc-core/trunk/src/grpSd/
113 Read with single block works on cards, but not in simulation. SdData.sv
sends data with one "XXXX" cycle right before the crc.
rkastl 4948d 10h /sdhc-sc-core/trunk/src/grpSd/
112 Save wide mode with out gHighSpeedMode = true rkastl 4948d 10h /sdhc-sc-core/trunk/src/grpSd/
111 Sclk moved to neg. edge -> setup and hold times for fast mode are easier
to reach. (only micro sd does not work in fast mode).
rkastl 4948d 10h /sdhc-sc-core/trunk/src/grpSd/
110 All except microsd work in highspeed mode. rkastl 4948d 10h /sdhc-sc-core/trunk/src/grpSd/
109 Added a data ram. rkastl 4948d 10h /sdhc-sc-core/trunk/src/grpSd/
108 Added a ram to the testbed rkastl 4948d 10h /sdhc-sc-core/trunk/src/grpSd/
106 Fixes #29: All cards respond, but they do not all work. rkastl 4948d 10h /sdhc-sc-core/trunk/src/grpSd/
105 Changing speed works! refs #33 rkastl 4948d 10h /sdhc-sc-core/trunk/src/grpSd/
104 SdController: Configuration ready to switch to high speed, refs #33 rkastl 4948d 10h /sdhc-sc-core/trunk/src/grpSd/
103 SdController: Checking speed works rkastl 4948d 10h /sdhc-sc-core/trunk/src/grpSd/
102 SdController: Enabling wide mode works, refs #33 rkastl 4948d 10h /sdhc-sc-core/trunk/src/grpSd/
101 Receiving response to ACMD51 works including data, refs #33. rkastl 4948d 10h /sdhc-sc-core/trunk/src/grpSd/
100 SdController: Receiving data after ACMD51, but CRC is wrong rkastl 4948d 10h /sdhc-sc-core/trunk/src/grpSd/
99 SdController: Checking bus width without receiving data response rkastl 4948d 10h /sdhc-sc-core/trunk/src/grpSd/
98 SdController: Receive response to CMD7 (except when busy is activated) rkastl 4948d 10h /sdhc-sc-core/trunk/src/grpSd/
97 SdController: CMD55 out of main state into Region rkastl 4948d 10h /sdhc-sc-core/trunk/src/grpSd/
96 SdController: Region extracted from main state, select card in config
state
rkastl 4948d 10h /sdhc-sc-core/trunk/src/grpSd/
95 SdController: entity and architecture split, all outputs registered
SdCardModel: Delay between response and next command added
SdData: Busy checking

refs #33
rkastl 4948d 10h /sdhc-sc-core/trunk/src/grpSd/
94 CmdTimeout (8 Clocks) added, SdData inserted into top, refs #31 rkastl 4948d 10h /sdhc-sc-core/trunk/src/grpSd/
93 Don´t run a full synthesis for SdData alone. It won´t fit. rkastl 4948d 10h /sdhc-sc-core/trunk/src/grpSd/
92 SdData: Sending in standard and wide mode (incl. simple not automated
testbench and synthesis), refs #31.
rkastl 4948d 10h /sdhc-sc-core/trunk/src/grpSd/
90 Fixes the milestone ReadCID. It works with SD2.0 (non HC) card. rkastl 4948d 10h /sdhc-sc-core/trunk/src/grpSd/
89 Fixes #27, R3 uses '1111111' as CRC. rkastl 4948d 10h /sdhc-sc-core/trunk/src/grpSd/
88 Timeouts inserted, Sending Card status via Rs232 if changed rkastl 4948d 10h /sdhc-sc-core/trunk/src/grpSd/
87 TbdSd: Baudrate set to 115200, refs #28 rkastl 4948d 10h /sdhc-sc-core/trunk/src/grpSd/
86 Rs232Tx: testbench, refs #28 rkastl 4948d 10h /sdhc-sc-core/trunk/src/grpSd/
85 Synthese: TbdSd refactored to enable sharing.
Sim: SdVerificationTestbench to new tcl script ported
SdController: TimeoutGenerator added, refs #27
rkastl 4948d 10h /sdhc-sc-core/trunk/src/grpSd/
84 SdController: Refactored rkastl 4948d 10h /sdhc-sc-core/trunk/src/grpSd/

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