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[/] [sdhc-sc-core/] [trunk/] [src/] [grpSd/] [unitSdVerificationTestbench/] - Rev 169

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Rev Log message Author Age Path
165 Only use synchronous high active reset in SDHC-SC-Core. rkastl 4934d 12h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
164 Headers updated (LGPL, consistent format) rkastl 4934d 12h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
161 Verification:
CardModel: Check CRC on received data
rkastl 4934d 12h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
160 Verification:
Full random read and write single blocks sequence works with
checks.
Checking the CRC in the card model is missing.
Writing at addresses above the card size is missing.
Erasing is missing.
rkastl 4934d 12h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
158 Verification:
Work on Checking
Functional coverage
rkastl 4934d 12h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
157 Verification:
Testcase with Reads works but Verification not completly
implemented.
rkastl 4934d 12h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
156 SdVerification:
+ Split a SdCoreTransaction into multiple WbTransactions: Proof
of Concept with a ReadSingleBlock-Transaction
+ Finish after certain amount of time and present simulation
result
rkastl 4934d 12h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
153 SdVerification:
further development, not done by far
rkastl 4934d 12h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
151 Verification:
+ redesign: not functional yet
rkastl 4934d 12h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
150 Testbed:
+ Simulation made possible
+ Write works
- Sometimes the alignment in the block is not right
rkastl 4934d 12h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
148 SdVerification:
+ CardModel: Execution thread which starts initialization and
then receives token and parses them.

TbdSd:
+ Added SdWbSdSynchronization.
rkastl 4934d 12h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
147 Sd-Core:
+ Added checking of Busy signal after write
rkastl 4934d 12h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
145 Verification:
+ SdCardModel and SdBFM seperated
rkastl 4934d 12h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
136 SDHC:
- SdData refactored to use a single counter
- TestWbMaster added to TbdSd (not functional yet)
rkastl 4934d 12h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
135 Multiple-Inclusion-Protection to SystemVerilog files added
Stops using relative paths in `includes. instead +incdir has to be used.
rkastl 4934d 12h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
126 Read and Write works in simulation, needs verification.
Synthesis works the same like before.
rkastl 4934d 12h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
125 Write works in simulation rkastl 4934d 12h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
124 Write: SdClk is disabled, if no data is available. rkastl 4934d 12h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
123 Write: Must be able to halt SdClk, rest is done. rkastl 4934d 12h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
122 SdController: Initial read support rkastl 4934d 16h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
121 SdWbSlave inserted into SdTop. SdController does not use it yet. rkastl 4934d 16h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
113 Read with single block works on cards, but not in simulation. SdData.sv
sends data with one "XXXX" cycle right before the crc.
rkastl 4934d 16h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
111 Sclk moved to neg. edge -> setup and hold times for fast mode are easier
to reach. (only micro sd does not work in fast mode).
rkastl 4934d 16h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
110 All except microsd work in highspeed mode. rkastl 4934d 16h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
109 Added a data ram. rkastl 4934d 16h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
108 Added a ram to the testbed rkastl 4934d 16h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
106 Fixes #29: All cards respond, but they do not all work. rkastl 4934d 16h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
105 Changing speed works! refs #33 rkastl 4934d 16h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
101 Receiving response to ACMD51 works including data, refs #33. rkastl 4934d 16h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
100 SdController: Receiving data after ACMD51, but CRC is wrong rkastl 4934d 16h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/

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