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[/] [socgen/] [trunk/] [doc/] - Rev 134

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Rev Log message Author Age Path
134 Resynced database
socgen now supports elaboration
Bad news is that it is now alot slower.
jt_eaton 3318d 03h /socgen/trunk/doc/
128 major cleanup
added toolflows for sim,syn,documentation,linting and verilog
added documentation tools
jt_eaton 3952d 00h /socgen/trunk/doc/
125 Added two new 6502 cores in www.6502.org

cleaned up sogen xml files and added module name control
jt_eaton 4164d 19h /socgen/trunk/doc/
124 beta release candidate 1
changed design.xml name
aligned schema with filesystem
jt_eaton 4217d 22h /socgen/trunk/doc/
120 clean up componentGenerators names and directories
sim + lint now synthesis TestBench
jt_eaton 4279d 00h /socgen/trunk/doc/
119 moved copyright files into /verilog
changed cde copyright to apache from gplv3
split out tools into separate subdirectories
changed design.xml files to socgen: namespace
jt_eaton 4313d 18h /socgen/trunk/doc/
115 split or1200_cpu up into all ip-xact components
removed dead files
jt_eaton 4456d 00h /socgen/trunk/doc/
103 added user guide
resynced to local repository
jt_eaton 4531d 20h /socgen/trunk/doc/
99 moved all projects into /projects/opencores.org
added build_register
added fizzim
jt_eaton 4649d 17h /socgen/trunk/doc/
94 socgen now supports both sim and syn views
now allow each xml file to set its destination
jt_eaton 4795d 18h /socgen/trunk/doc/
85 moved all synthesis into fpgas lib
fixed memory leak in recursive routines
jt_eaton 4868d 15h /socgen/trunk/doc/
81 morphing xml files to use 1685
removed log directories
jt_eaton 4955d 01h /socgen/trunk/doc/
80 now generate all sims and syns param and filelists for xml jt_eaton 4984d 16h /socgen/trunk/doc/
67 updated installs jt_eaton 5019d 18h /socgen/trunk/doc/
65 added params.sim to sims
updated install's
jt_eaton 5025d 18h /socgen/trunk/doc/
56 soc_builder now builds verilog from xml files jt_eaton 5040d 04h /socgen/trunk/doc/
54 now set up fpga targets from xml files jt_eaton 5043d 02h /socgen/trunk/doc/
49 added covered code coverage
added xml descriptors
added soc_Link tool
jt_eaton 5045d 19h /socgen/trunk/doc/
39 added io_probe to sims
added boot rom into 6502
added T6502_control
jt_eaton 5125d 15h /socgen/trunk/doc/
28 added T6502 processor
added vga_char_ctrl
jt_eaton 5148d 03h /socgen/trunk/doc/
27 added uart and ps2 host and models
added more documentation
jt_eaton 5169d 18h /socgen/trunk/doc/
26 moved install instructions from doc -> tools
added scripts to install or32 gnu toolchain and fizzim state tool
jt_eaton 5178d 06h /socgen/trunk/doc/
20 added Nexys2 support
expanded docs
created tools directory
jt_eaton 5180d 15h /socgen/trunk/doc/
19 added serial_xmit module
updated and added docs
jt_eaton 5187d 21h /socgen/trunk/doc/
13 updated for xilinx webpack 11.1 jt_eaton 5218d 18h /socgen/trunk/doc/
3 started bin and lib directories,
added install instructions for ubuntu 9.04
jt_eaton 5235d 17h /socgen/trunk/doc/
2 added starting docs jt_eaton 5237d 01h /socgen/trunk/doc/

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