OpenCores
URL https://opencores.org/ocsvn/spi_boot/spi_boot/trunk

Subversion Repositories spi_boot

[/] [spi_boot/] [tags/] [rel_3_1_rev_C/] - Rev 74

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
74 New directory structure. root 5630d 02h /spi_boot/tags/rel_3_1_rev_C/
71 This commit was manufactured by cvs2svn to create tag 'rel_3_1_rev_C'. 6210d 10h /tags/rel_3_1_rev_C/
50 document rev. 3.1 arniml 7054d 00h /trunk/
49 add doc directory to project structure arniml 7055d 14h /trunk/
48 add ram_loader and related testbench arniml 7055d 14h /trunk/
47 schematic revision C arniml 7055d 14h /trunk/
46 document rev. 3.0 arniml 7055d 14h /trunk/
45 revision 3.0:
+ added detached output
+ describe interfacing on data port
+ several improvements		 arniml 7055d 14h /trunk/
44 add detached output arniml 7055d 14h /trunk/
43 add new testbench for ram_loader arniml 7059d 17h /trunk/
42 initial check-in arniml 7059d 17h /trunk/
41 rework for detached_i information arniml 7059d 18h /trunk/
40 add new port detached_o arniml 7062d 14h /trunk/
39 describe sets
-> prepared for release of version 2.0, rev. B		 arniml 7087d 17h /trunk/
38 invert level of set_sel input arniml 7091d 15h /trunk/
37 make verbosity level switchable arniml 7091d 15h /trunk/
36 update set_sel input arniml 7091d 15h /trunk/
35 added set selection arniml 7092d 13h /trunk/
34 added integer->string conversion function arniml 7092d 13h /trunk/
33 document rev. 2.0 arniml 7092d 13h /trunk/
32 schematic revision B arniml 7092d 13h /trunk/
31 revision 2.0:
+ set selection
+ memory organization		 arniml 7092d 13h /trunk/
30 update for rev. 2.0 arniml 7092d 13h /trunk/
29 initial check-in arniml 7092d 13h /trunk/
28 document version 1.0 arniml 7101d 16h /trunk/
27 document version 1.0 arniml 7101d 16h /trunk/
26 fix typos arniml 7101d 16h /trunk/
25 hints for writing data to the card arniml 7108d 16h /trunk/
24 added Hama 64 MB SD arniml 7108d 18h /trunk/
23 correction arniml 7108d 21h /trunk/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.