OpenCores
URL https://opencores.org/ocsvn/t400/t400/trunk

Subversion Repositories t400

[/] [t400/] [trunk/] [bench/] - Rev 176

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
176 New directory structure. root 5568d 11h /t400/trunk/bench/
144 initial check-in arniml 6570d 22h /trunk/bench/
139 initial check-in arniml 6571d 07h /trunk/bench/
125 initial check-in arniml 6572d 02h /trunk/bench/
117 initial check-in arniml 6577d 00h /trunk/bench/
105 remove obsolete en_clk_s arniml 6577d 02h /trunk/bench/
104 fix typo arniml 6577d 06h /trunk/bench/
97 lower nibble is OD to prevent contention with testbench arniml 6584d 22h /trunk/bench/
91 don't generate interrupt when in interrupt routine around 0x100 arniml 6585d 05h /trunk/bench/
78 provide SA at L port arniml 6585d 18h /trunk/bench/
73 use 'after' instead of wait for signal delay
should resolve problems with delta cycle arrival times
arniml 6585d 22h /trunk/bench/
67 explicitly select clock divider 4 arniml 6586d 01h /trunk/bench/
66 explicitly select clock divider 8 arniml 6586d 01h /trunk/bench/
65 add global signals for testbench instrumentation arniml 6586d 02h /trunk/bench/
64 add fail reporting for port d arniml 6586d 02h /trunk/bench/
63 initial check-in arniml 6586d 02h /trunk/bench/
60 connect cko_i to bit 2 of IN bus arniml 6589d 20h /trunk/bench/
58 consider IN port arniml 6590d 19h /trunk/bench/
57 consider CKO and IN port arniml 6590d 19h /trunk/bench/
56 drive IN port arniml 6590d 19h /trunk/bench/
31 extend D-port checks arniml 6595d 20h /trunk/bench/
29 enhance G-port check for T420 arniml 6596d 20h /trunk/bench/
20 initial check-in arniml 6597d 22h /trunk/bench/
19 moved elements to separate design unit tb_elems arniml 6597d 23h /trunk/bench/
18 initial check-in arniml 6597d 23h /trunk/bench/
15 initial check-in arniml 6598d 22h /trunk/bench/
7 remove delta cycle filter on sk_s arniml 6607d 07h /trunk/bench/
2 import from local CVS repository, LOC_CVS_0_1 arniml 6607d 19h /trunk/bench/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.