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[/] [t48/] [tags/] [rel_0_1_beta/] [rtl/] - Rev 343

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Rev	Log message	Author	Age	Path
292	New directory structure.	root	5601d 23h	/t48/tags/rel_0_1_beta/rtl/
251	This commit was manufactured by cvs2svn to create tag 'rel_0_1_beta'.		6572d 08h	/t48/tags/rel_0_1_beta/rtl/
86	update notice about expander port instructions	arniml	7375d 21h	/t48/tags/rel_0_1_beta/rtl/
78	adjust external timing of BUS	arniml	7381d 17h	/t48/tags/rel_0_1_beta/rtl/
77	move from std_logic_arith to numeric_std	arniml	7382d 09h	/t48/tags/rel_0_1_beta/rtl/
73	removed dummy_s - workaround not longer needed for GHDL 0.11.1	arniml	7382d 21h	/t48/tags/rel_0_1_beta/rtl/
72	removed superfluous signal from sensitivity list	arniml	7382d 21h	/t48/tags/rel_0_1_beta/rtl/
66	add temporary workaround for GHDL 0.11	arniml	7388d 14h	/t48/tags/rel_0_1_beta/rtl/
65	clean up sensitivity list	arniml	7388d 14h	/t48/tags/rel_0_1_beta/rtl/
64	+ enhance instruction strobe generation + rework address output under EA=1 conditions	arniml	7388d 14h	/t48/tags/rel_0_1_beta/rtl/
63	reset machine state to MSTATE3 to allow proper instruction fetch after reset	arniml	7388d 14h	/t48/tags/rel_0_1_beta/rtl/
62	initial check-in	arniml	7388d 14h	/t48/tags/rel_0_1_beta/rtl/
60	+ add marker for injected calls + suppress intstruction strobes for injected calls	arniml	7391d 11h	/t48/tags/rel_0_1_beta/rtl/
59	increment prescaler with MSTATE4	arniml	7391d 11h	/t48/tags/rel_0_1_beta/rtl/
54	- add tb_istrobe_s	arniml	7392d 12h	/t48/tags/rel_0_1_beta/rtl/
53	make istrobe visible through testbench package	arniml	7392d 12h	/t48/tags/rel_0_1_beta/rtl/
45	remove unused signals	arniml	7399d 11h	/t48/tags/rel_0_1_beta/rtl/
44	default assignment for aux_carry_o	arniml	7399d 12h	/t48/tags/rel_0_1_beta/rtl/
43	fix sensitivity list	arniml	7400d 13h	/t48/tags/rel_0_1_beta/rtl/
40	rework adder and force resource sharing between ADD, INC and DEC	arniml	7400d 15h	/t48/tags/rel_0_1_beta/rtl/
38	add measures to implement XCHD	arniml	7402d 19h	/t48/tags/rel_0_1_beta/rtl/
37	add dump_compare support	arniml	7402d 19h	/t48/tags/rel_0_1_beta/rtl/
32	rename pX_limp to pX_low_imp	arniml	7408d 13h	/t48/tags/rel_0_1_beta/rtl/
29	take auxiliary carry from direct ALU connection	arniml	7409d 11h	/t48/tags/rel_0_1_beta/rtl/
28	update wiring for DA support	arniml	7409d 11h	/t48/tags/rel_0_1_beta/rtl/
27	implemented mnemonic DA	arniml	7409d 12h	/t48/tags/rel_0_1_beta/rtl/
26	support for DA instruction	arniml	7409d 12h	/t48/tags/rel_0_1_beta/rtl/
24	connect control signal for Port 2 expander	arniml	7409d 20h	/t48/tags/rel_0_1_beta/rtl/
23	rework Port 2 expander handling	arniml	7409d 20h	/t48/tags/rel_0_1_beta/rtl/
22	merge MN_ANLD, MN_MOVD_PP_A and MN_ORLD_PP_A to OUTLD_PP_A	arniml	7409d 20h	/t48/tags/rel_0_1_beta/rtl/

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[/] [t48/] [tags/] [rel_0_1_beta/] [rtl/] - Rev 343

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