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[/] [t48/] [tags/] [rel_0_2_beta/] - Rev 92

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Rev	Log message	Author	Age	Path
92	work around bug in Quartus II 4.0	arniml	7378d 04h	/t48/tags/rel_0_2_beta/
91	fix edge detector bug for counter	arniml	7378d 04h	/t48/tags/rel_0_2_beta/
90	intial check-in	arniml	7378d 04h	/t48/tags/rel_0_2_beta/
89	initial check-in	arniml	7392d 00h	/t48/tags/rel_0_2_beta/
88	allow memory bank switching during interrupts	arniml	7393d 02h	/t48/tags/rel_0_2_beta/
87	abort gracfullt if memory bank switching does not work	arniml	7393d 02h	/t48/tags/rel_0_2_beta/
86	update notice about expander port instructions	arniml	7393d 07h	/t48/tags/rel_0_2_beta/
85	initial check-in	arniml	7393d 07h	/t48/tags/rel_0_2_beta/
84	add if_timing module	arniml	7398d 23h	/t48/tags/rel_0_2_beta/
83	connect if_timing to P2 output of T48	arniml	7398d 23h	/t48/tags/rel_0_2_beta/
82	check expander timings	arniml	7398d 23h	/t48/tags/rel_0_2_beta/
81	initial check-in	arniml	7399d 03h	/t48/tags/rel_0_2_beta/
80	added if_timing	arniml	7399d 03h	/t48/tags/rel_0_2_beta/
79	add if_timing module	arniml	7399d 03h	/t48/tags/rel_0_2_beta/
78	adjust external timing of BUS	arniml	7399d 03h	/t48/tags/rel_0_2_beta/
77	move from std_logic_arith to numeric_std	arniml	7399d 20h	/t48/tags/rel_0_2_beta/
76	initial check-in	arniml	7399d 23h	/t48/tags/rel_0_2_beta/
75	remove obsolete design unit	arniml	7400d 00h	/t48/tags/rel_0_2_beta/
74	enhance pass/fail detection	arniml	7400d 08h	/t48/tags/rel_0_2_beta/
73	removed dummy_s - workaround not longer needed for GHDL 0.11.1	arniml	7400d 08h	/t48/tags/rel_0_2_beta/
72	removed superfluous signal from sensitivity list	arniml	7400d 08h	/t48/tags/rel_0_2_beta/
71	add T8039 and its testbench	arniml	7406d 00h	/t48/tags/rel_0_2_beta/
70	clean test cell before make	arniml	7406d 00h	/t48/tags/rel_0_2_beta/
69	fix name of istrobe	arniml	7406d 00h	/t48/tags/rel_0_2_beta/
68	connect T0 and T1 to P1	arniml	7406d 00h	/t48/tags/rel_0_2_beta/
67	initial check-in	arniml	7406d 00h	/t48/tags/rel_0_2_beta/
66	add temporary workaround for GHDL 0.11	arniml	7406d 00h	/t48/tags/rel_0_2_beta/
65	clean up sensitivity list	arniml	7406d 00h	/t48/tags/rel_0_2_beta/
64	+ enhance instruction strobe generation + rework address output under EA=1 conditions	arniml	7406d 00h	/t48/tags/rel_0_2_beta/
63	reset machine state to MSTATE3 to allow proper instruction fetch after reset	arniml	7406d 00h	/t48/tags/rel_0_2_beta/

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Subversion Repositories t48

[/] [t48/] [tags/] [rel_0_2_beta/] - Rev 92

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