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[/] [t48/] [tags/] [rel_0_3_beta/] [sw/] - Rev 97

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Rev Log message Author Age Path
97 initial check-in arniml 7460d 08h /t48/tags/rel_0_3_beta/sw/
96 select dedicated directorie(s) for regression arniml 7461d 06h /t48/tags/rel_0_3_beta/sw/
95 check counter inactivity arniml 7461d 06h /t48/tags/rel_0_3_beta/sw/
94 initial check-in arniml 7461d 06h /t48/tags/rel_0_3_beta/sw/
90 intial check-in arniml 7461d 07h /t48/tags/rel_0_3_beta/sw/
89 initial check-in arniml 7475d 03h /t48/tags/rel_0_3_beta/sw/
88 allow memory bank switching during interrupts arniml 7476d 05h /t48/tags/rel_0_3_beta/sw/
87 abort gracfullt if memory bank switching does not work arniml 7476d 05h /t48/tags/rel_0_3_beta/sw/
85 initial check-in arniml 7476d 10h /t48/tags/rel_0_3_beta/sw/
74 enhance pass/fail detection arniml 7483d 11h /t48/tags/rel_0_3_beta/sw/
70 clean test cell before make arniml 7489d 03h /t48/tags/rel_0_3_beta/sw/
69 fix name of istrobe arniml 7489d 03h /t48/tags/rel_0_3_beta/sw/
61 expand script for dump compare arniml 7491d 00h /t48/tags/rel_0_3_beta/sw/
58 add periodic interrupt arniml 7492d 00h /t48/tags/rel_0_3_beta/sw/
57 abort if no interrupt occurs arniml 7492d 00h /t48/tags/rel_0_3_beta/sw/
52 + fix bug in PSW[3]
+ read SP properly for dump
arniml 7493d 01h /t48/tags/rel_0_3_beta/sw/
51 + implement Port1 and Port2
+ connect T0 and T1
+ return proper program memory contents
arniml 7493d 01h /t48/tags/rel_0_3_beta/sw/
49 Imported sources arniml 7498d 03h /t48/tags/rel_0_3_beta/sw/
48 update copyright notice arniml 7498d 03h /t48/tags/rel_0_3_beta/sw/
47 initial check-in arniml 7498d 03h /t48/tags/rel_0_3_beta/sw/
46 fix test arniml 7500d 00h /t48/tags/rel_0_3_beta/sw/
42 change test values that match better to the test case arniml 7501d 04h /t48/tags/rel_0_3_beta/sw/
41 expand PATH arniml 7501d 04h /t48/tags/rel_0_3_beta/sw/
39 initial check-in arniml 7503d 08h /t48/tags/rel_0_3_beta/sw/
36 make calculation of expected value more readable arniml 7503d 09h /t48/tags/rel_0_3_beta/sw/
35 initial check-in arniml 7506d 02h /t48/tags/rel_0_3_beta/sw/
34 fix test wrt AC arniml 7509d 02h /t48/tags/rel_0_3_beta/sw/
25 initial check-in arniml 7510d 01h /t48/tags/rel_0_3_beta/sw/
18 fix constant format arniml 7512d 00h /t48/tags/rel_0_3_beta/sw/
17 fix test arniml 7512d 00h /t48/tags/rel_0_3_beta/sw/

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