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[/] [t48/] [tags/] [rel_0_4_beta/] - Rev 295

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Rev Log message Author Age Path
292 New directory structure. root 5667d 04h /t48/tags/rel_0_4_beta/
254 This commit was manufactured by cvs2svn to create tag 'rel_0_4_beta'. 6637d 13h /tags/rel_0_4_beta/
137 add link to COMPILE_LIST arniml 7302d 18h /trunk/
136 initial check-in arniml 7302d 18h /trunk/
135 add bug
PSENn Timing		 arniml 7307d 04h /trunk/
134 Fix bug report:
"PSENn Timing"
PSEN is now only asserted for the second cycle if explicitely
requested by assert_psen_s.
The previous implementation asserted PSEN together with RD or WR.		 arniml 7307d 14h /trunk/
133 add checks for PSEN arniml 7307d 14h /trunk/
132 stop simulation upon assertion error arniml 7307d 14h /trunk/
131 update arniml 7307d 14h /trunk/
130 initial check-in arniml 7307d 14h /trunk/
129 cleanup copyright notice arniml 7369d 21h /trunk/
128 counter_q is not cleared during reset
this would match all different descriptions of the Counter as
a) if the software assumes that the Counter is modified during reset, it
will initialize the Counter anyhow
b) the special case 'Counter not modified during reset' is covered		 arniml 7377d 01h /trunk/
127 + log status of A11 properly during interrupt routines
+ trigger counter on negative edge of T1 instead of positive edge		 arniml 7377d 02h /trunk/
126 + specify hex file for external ROM on i8039 command line
+ support for no_dump_compare file in test cell		 arniml 7377d 02h /trunk/
125 exclude from dump compare arniml 7377d 02h /trunk/
124 fix wrong handling of MB after return from interrupt arniml 7378d 00h /trunk/
123 support hex file for external ROM arniml 7378d 00h /trunk/
122 test MB after return from interrupt arniml 7378d 00h /trunk/
121 update bug description for
Program Memory bank can be switched during interrupt		 arniml 7380d 17h /trunk/
120 Fix bug report:
"Program Memory bank can be switched during interrupt"
int module emits int_in_progress signal that is used inside the decoder
to hold mb low for JMP and CALL during interrupts		 arniml 7380d 17h /trunk/
119 add int_in_progress_o to entity of int module arniml 7380d 17h /trunk/
118 test MB/interrupt behaviour according to bug report
"Program Memory bank can be switched during interrupt"		 arniml 7380d 17h /trunk/
117 add bug
Program Memory bank can be switched during interrupt		 arniml 7381d 18h /trunk/
116 adapt to GHDL 0.12 / gcc 3.4.0 arniml 7409d 18h /trunk/
115 extend description arniml 7410d 22h /trunk/
114 initial check-in arniml 7414d 18h /trunk/
113 generate two ROM files based on address:
+ 0 - 2047 : 2k internal ROM
+ 2048 - 4095 : 2k external ROM		 arniml 7421d 03h /trunk/
112 update tb_behav_c0 for new ROM layout arniml 7421d 03h /trunk/
111 split 4k internal ROM into
+ 2k internal ROM
+ 2k external ROM
EA of t48_core is driven by MSB of internal ROM address
if upper 2k block is selected, the system switches to EA mode on the fly		 arniml 7421d 03h /trunk/
110 exchange syn_rom for lpm_rom arniml 7421d 03h /trunk/

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