OpenCores
URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_0_4_beta/] - Rev 305

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
292 New directory structure. root 5664d 01h /t48/tags/rel_0_4_beta/
254 This commit was manufactured by cvs2svn to create tag 'rel_0_4_beta'. 6634d 10h /tags/rel_0_4_beta/
137 add link to COMPILE_LIST arniml 7299d 14h /trunk/
136 initial check-in arniml 7299d 14h /trunk/
135 add bug
PSENn Timing		 arniml 7304d 00h /trunk/
134 Fix bug report:
"PSENn Timing"
PSEN is now only asserted for the second cycle if explicitely
requested by assert_psen_s.
The previous implementation asserted PSEN together with RD or WR.		 arniml 7304d 10h /trunk/
133 add checks for PSEN arniml 7304d 10h /trunk/
132 stop simulation upon assertion error arniml 7304d 10h /trunk/
131 update arniml 7304d 10h /trunk/
130 initial check-in arniml 7304d 10h /trunk/
129 cleanup copyright notice arniml 7366d 18h /trunk/
128 counter_q is not cleared during reset
this would match all different descriptions of the Counter as
a) if the software assumes that the Counter is modified during reset, it
will initialize the Counter anyhow
b) the special case 'Counter not modified during reset' is covered		 arniml 7373d 22h /trunk/
127 + log status of A11 properly during interrupt routines
+ trigger counter on negative edge of T1 instead of positive edge		 arniml 7373d 23h /trunk/
126 + specify hex file for external ROM on i8039 command line
+ support for no_dump_compare file in test cell		 arniml 7373d 23h /trunk/
125 exclude from dump compare arniml 7373d 23h /trunk/
124 fix wrong handling of MB after return from interrupt arniml 7374d 20h /trunk/
123 support hex file for external ROM arniml 7374d 20h /trunk/
122 test MB after return from interrupt arniml 7374d 20h /trunk/
121 update bug description for
Program Memory bank can be switched during interrupt		 arniml 7377d 13h /trunk/
120 Fix bug report:
"Program Memory bank can be switched during interrupt"
int module emits int_in_progress signal that is used inside the decoder
to hold mb low for JMP and CALL during interrupts		 arniml 7377d 13h /trunk/
119 add int_in_progress_o to entity of int module arniml 7377d 13h /trunk/
118 test MB/interrupt behaviour according to bug report
"Program Memory bank can be switched during interrupt"		 arniml 7377d 13h /trunk/
117 add bug
Program Memory bank can be switched during interrupt		 arniml 7378d 14h /trunk/
116 adapt to GHDL 0.12 / gcc 3.4.0 arniml 7406d 14h /trunk/
115 extend description arniml 7407d 18h /trunk/
114 initial check-in arniml 7411d 14h /trunk/
113 generate two ROM files based on address:
+ 0 - 2047 : 2k internal ROM
+ 2048 - 4095 : 2k external ROM		 arniml 7417d 23h /trunk/
112 update tb_behav_c0 for new ROM layout arniml 7417d 23h /trunk/
111 split 4k internal ROM into
+ 2k internal ROM
+ 2k external ROM
EA of t48_core is driven by MSB of internal ROM address
if upper 2k block is selected, the system switches to EA mode on the fly		 arniml 7417d 23h /trunk/
110 exchange syn_rom for lpm_rom arniml 7417d 23h /trunk/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.