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[/] [t48/] [tags/] [rel_1_0/] - Rev 97

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Rev	Log message	Author	Age	Path
97	initial check-in	arniml	7363d 12h	/t48/tags/rel_1_0/
96	select dedicated directorie(s) for regression	arniml	7364d 10h	/t48/tags/rel_1_0/
95	check counter inactivity	arniml	7364d 10h	/t48/tags/rel_1_0/
94	initial check-in	arniml	7364d 10h	/t48/tags/rel_1_0/
93	add support for line coverage evaluation with gcov	arniml	7364d 10h	/t48/tags/rel_1_0/
92	work around bug in Quartus II 4.0	arniml	7364d 11h	/t48/tags/rel_1_0/
91	fix edge detector bug for counter	arniml	7364d 11h	/t48/tags/rel_1_0/
90	intial check-in	arniml	7364d 11h	/t48/tags/rel_1_0/
89	initial check-in	arniml	7378d 07h	/t48/tags/rel_1_0/
88	allow memory bank switching during interrupts	arniml	7379d 09h	/t48/tags/rel_1_0/
87	abort gracfullt if memory bank switching does not work	arniml	7379d 09h	/t48/tags/rel_1_0/
86	update notice about expander port instructions	arniml	7379d 14h	/t48/tags/rel_1_0/
85	initial check-in	arniml	7379d 14h	/t48/tags/rel_1_0/
84	add if_timing module	arniml	7385d 05h	/t48/tags/rel_1_0/
83	connect if_timing to P2 output of T48	arniml	7385d 05h	/t48/tags/rel_1_0/
82	check expander timings	arniml	7385d 05h	/t48/tags/rel_1_0/
81	initial check-in	arniml	7385d 10h	/t48/tags/rel_1_0/
80	added if_timing	arniml	7385d 10h	/t48/tags/rel_1_0/
79	add if_timing module	arniml	7385d 10h	/t48/tags/rel_1_0/
78	adjust external timing of BUS	arniml	7385d 10h	/t48/tags/rel_1_0/
77	move from std_logic_arith to numeric_std	arniml	7386d 02h	/t48/tags/rel_1_0/
76	initial check-in	arniml	7386d 06h	/t48/tags/rel_1_0/
75	remove obsolete design unit	arniml	7386d 06h	/t48/tags/rel_1_0/
74	enhance pass/fail detection	arniml	7386d 15h	/t48/tags/rel_1_0/
73	removed dummy_s - workaround not longer needed for GHDL 0.11.1	arniml	7386d 15h	/t48/tags/rel_1_0/
72	removed superfluous signal from sensitivity list	arniml	7386d 15h	/t48/tags/rel_1_0/
71	add T8039 and its testbench	arniml	7392d 07h	/t48/tags/rel_1_0/
70	clean test cell before make	arniml	7392d 07h	/t48/tags/rel_1_0/
69	fix name of istrobe	arniml	7392d 07h	/t48/tags/rel_1_0/
68	connect T0 and T1 to P1	arniml	7392d 07h	/t48/tags/rel_1_0/

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Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_0/] - Rev 97

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