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[/] [t48/] [tags/] [rel_1_1/] [bench/] - Rev 292

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Rev	Log message	Author	Age	Path
292	New directory structure.	root	5589d 20h	/t48/tags/rel_1_1/bench/
289	This commit was manufactured by cvs2svn to create tag 'rel_1_1'.		5903d 07h	/t48/tags/rel_1_1/bench/
282	decouple bidir port T0 from P1 fixes testcase black_box/tx/t0	arniml	5905d 07h	/t48/tags/rel_1_1/bench/
248	initial check-in	arniml	6560d 05h	/t48/tags/rel_1_1/bench/
247	initial check-in	arniml	6560d 07h	/t48/tags/rel_1_1/bench/
240	comment added about lower 1k of external ROM	arniml	6580d 05h	/t48/tags/rel_1_1/bench/
234	cleanup & enhance external access	arniml	6582d 05h	/t48/tags/rel_1_1/bench/
233	added external ROM	arniml	6582d 05h	/t48/tags/rel_1_1/bench/
228	replaced syn_ram and syn_rom with generic_ram_ena and t48_rom/t49_rom/t3x_rom	arniml	6583d 05h	/t48/tags/rel_1_1/bench/
224	initial check-in	arniml	6583d 05h	/t48/tags/rel_1_1/bench/
220	new input xtal_en_i	arniml	6584d 05h	/t48/tags/rel_1_1/bench/
202	fix address assignment	arniml	6814d 08h	/t48/tags/rel_1_1/bench/
201	split low impedance markers for P2	arniml	6814d 08h	/t48/tags/rel_1_1/bench/
200	add check for tCP: Port Control Setup to PROG'	arniml	6814d 08h	/t48/tags/rel_1_1/bench/
183	fix missing assignment to outclock	arniml	6869d 12h	/t48/tags/rel_1_1/bench/
160	add others to case statement	arniml	7147d 10h	/t48/tags/rel_1_1/bench/
140	remove tAW sanity check conflicts with OUTL A, BUS	arniml	7186d 10h	/t48/tags/rel_1_1/bench/
133	add checks for PSEN	arniml	7230d 05h	/t48/tags/rel_1_1/bench/
111	split 4k internal ROM into + 2k internal ROM + 2k external ROM EA of t48_core is driven by MSB of internal ROM address if upper 2k block is selected, the system switches to EA mode on the fly	arniml	7343d 18h	/t48/tags/rel_1_1/bench/
110	exchange syn_rom for lpm_rom	arniml	7343d 18h	/t48/tags/rel_1_1/bench/
103	add testbench peripherals for P1 and P2 this became necessary to observe a difference between externally applied port data and internally applied port data	arniml	7347d 15h	/t48/tags/rel_1_1/bench/
83	connect if_timing to P2 output of T48	arniml	7369d 09h	/t48/tags/rel_1_1/bench/
82	check expander timings	arniml	7369d 09h	/t48/tags/rel_1_1/bench/
81	initial check-in	arniml	7369d 13h	/t48/tags/rel_1_1/bench/
80	added if_timing	arniml	7369d 13h	/t48/tags/rel_1_1/bench/
68	connect T0 and T1 to P1	arniml	7376d 11h	/t48/tags/rel_1_1/bench/
67	initial check-in	arniml	7376d 11h	/t48/tags/rel_1_1/bench/
56	wait for instruction strobe after final end-of-simulation detection this ensures that the last mov instruction is part of the dump and enables 100% matching with i8039 simulator	arniml	7380d 09h	/t48/tags/rel_1_1/bench/
33	rename pX_limp to pX_low_imp	arniml	7396d 10h	/t48/tags/rel_1_1/bench/
30	connect prog_n_o	arniml	7397d 08h	/t48/tags/rel_1_1/bench/

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[/] [t48/] [tags/] [rel_1_1/] [bench/] - Rev 292

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