URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_2/] [bench/] - Rev 329

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Rev	Log message	Author	Age	Path
300	maintenance release for svn updates	arniml	5521d 06h	/t48/tags/rel_1_2/bench/
295	- remove unsupported CVS tags - propset for Id	arniml	5578d 09h	/t48/trunk/bench/
292	New directory structure.	root	5600d 18h	/t48/trunk/bench/
282	decouple bidir port T0 from P1 fixes testcase black_box/tx/t0	arniml	5916d 06h	/trunk/bench/
248	initial check-in	arniml	6571d 03h	/trunk/bench/
247	initial check-in	arniml	6571d 05h	/trunk/bench/
240	comment added about lower 1k of external ROM	arniml	6591d 03h	/trunk/bench/
234	cleanup & enhance external access	arniml	6593d 04h	/trunk/bench/
233	added external ROM	arniml	6593d 04h	/trunk/bench/
228	replaced syn_ram and syn_rom with generic_ram_ena and t48_rom/t49_rom/t3x_rom	arniml	6594d 03h	/trunk/bench/
224	initial check-in	arniml	6594d 03h	/trunk/bench/
220	new input xtal_en_i	arniml	6595d 03h	/trunk/bench/
202	fix address assignment	arniml	6825d 07h	/trunk/bench/
201	split low impedance markers for P2	arniml	6825d 07h	/trunk/bench/
200	add check for tCP: Port Control Setup to PROG'	arniml	6825d 07h	/trunk/bench/
183	fix missing assignment to outclock	arniml	6880d 11h	/trunk/bench/
160	add others to case statement	arniml	7158d 08h	/trunk/bench/
140	remove tAW sanity check conflicts with OUTL A, BUS	arniml	7197d 09h	/trunk/bench/
133	add checks for PSEN	arniml	7241d 04h	/trunk/bench/
111	split 4k internal ROM into + 2k internal ROM + 2k external ROM EA of t48_core is driven by MSB of internal ROM address if upper 2k block is selected, the system switches to EA mode on the fly	arniml	7354d 17h	/trunk/bench/
110	exchange syn_rom for lpm_rom	arniml	7354d 17h	/trunk/bench/
103	add testbench peripherals for P1 and P2 this became necessary to observe a difference between externally applied port data and internally applied port data	arniml	7358d 13h	/trunk/bench/
83	connect if_timing to P2 output of T48	arniml	7380d 07h	/trunk/bench/
82	check expander timings	arniml	7380d 07h	/trunk/bench/
81	initial check-in	arniml	7380d 12h	/trunk/bench/
80	added if_timing	arniml	7380d 12h	/trunk/bench/
68	connect T0 and T1 to P1	arniml	7387d 09h	/trunk/bench/
67	initial check-in	arniml	7387d 09h	/trunk/bench/
56	wait for instruction strobe after final end-of-simulation detection this ensures that the last mov instruction is part of the dump and enables 100% matching with i8039 simulator	arniml	7391d 07h	/trunk/bench/
33	rename pX_limp to pX_low_imp	arniml	7407d 08h	/trunk/bench/

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Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_2/] [bench/] - Rev 329

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