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[/] [t48/] [tags/] [rel_1_4/] - Rev 137

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Rev Log message Author Age Path
137 add link to COMPILE_LIST arniml 7267d 22h /t48/tags/rel_1_4/
136 initial check-in arniml 7267d 22h /t48/tags/rel_1_4/
135 add bug
PSENn Timing		 arniml 7272d 08h /t48/tags/rel_1_4/
134 Fix bug report:
"PSENn Timing"
PSEN is now only asserted for the second cycle if explicitely
requested by assert_psen_s.
The previous implementation asserted PSEN together with RD or WR.		 arniml 7272d 18h /t48/tags/rel_1_4/
133 add checks for PSEN arniml 7272d 18h /t48/tags/rel_1_4/
132 stop simulation upon assertion error arniml 7272d 18h /t48/tags/rel_1_4/
131 update arniml 7272d 18h /t48/tags/rel_1_4/
130 initial check-in arniml 7272d 18h /t48/tags/rel_1_4/
129 cleanup copyright notice arniml 7335d 02h /t48/tags/rel_1_4/
128 counter_q is not cleared during reset
this would match all different descriptions of the Counter as
a) if the software assumes that the Counter is modified during reset, it
will initialize the Counter anyhow
b) the special case 'Counter not modified during reset' is covered		 arniml 7342d 06h /t48/tags/rel_1_4/
127 + log status of A11 properly during interrupt routines
+ trigger counter on negative edge of T1 instead of positive edge		 arniml 7342d 07h /t48/tags/rel_1_4/
126 + specify hex file for external ROM on i8039 command line
+ support for no_dump_compare file in test cell		 arniml 7342d 07h /t48/tags/rel_1_4/
125 exclude from dump compare arniml 7342d 07h /t48/tags/rel_1_4/
124 fix wrong handling of MB after return from interrupt arniml 7343d 04h /t48/tags/rel_1_4/
123 support hex file for external ROM arniml 7343d 04h /t48/tags/rel_1_4/
122 test MB after return from interrupt arniml 7343d 04h /t48/tags/rel_1_4/
121 update bug description for
Program Memory bank can be switched during interrupt		 arniml 7345d 21h /t48/tags/rel_1_4/
120 Fix bug report:
"Program Memory bank can be switched during interrupt"
int module emits int_in_progress signal that is used inside the decoder
to hold mb low for JMP and CALL during interrupts		 arniml 7345d 21h /t48/tags/rel_1_4/
119 add int_in_progress_o to entity of int module arniml 7345d 21h /t48/tags/rel_1_4/
118 test MB/interrupt behaviour according to bug report
"Program Memory bank can be switched during interrupt"		 arniml 7345d 21h /t48/tags/rel_1_4/
117 add bug
Program Memory bank can be switched during interrupt		 arniml 7346d 22h /t48/tags/rel_1_4/
116 adapt to GHDL 0.12 / gcc 3.4.0 arniml 7374d 22h /t48/tags/rel_1_4/
115 extend description arniml 7376d 02h /t48/tags/rel_1_4/
114 initial check-in arniml 7379d 22h /t48/tags/rel_1_4/
113 generate two ROM files based on address:
+ 0 - 2047 : 2k internal ROM
+ 2048 - 4095 : 2k external ROM		 arniml 7386d 07h /t48/tags/rel_1_4/
112 update tb_behav_c0 for new ROM layout arniml 7386d 07h /t48/tags/rel_1_4/
111 split 4k internal ROM into
+ 2k internal ROM
+ 2k external ROM
EA of t48_core is driven by MSB of internal ROM address
if upper 2k block is selected, the system switches to EA mode on the fly		 arniml 7386d 07h /t48/tags/rel_1_4/
110 exchange syn_rom for lpm_rom arniml 7386d 07h /t48/tags/rel_1_4/
109 add new bug for release 0.1 BETA arniml 7386d 21h /t48/tags/rel_1_4/
108 Fix for:
External Program Memory ignored when EA = 0		 arniml 7386d 21h /t48/tags/rel_1_4/

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