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[/] [t48/] [tags/] [rel_1_4/] [rtl/] [vhdl/] - Rev 302

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Rev Log message Author Age Path
302 fix compile with ghdl arniml 1269d 20h /t48/tags/rel_1_4/rtl/vhdl/
295 - remove unsupported CVS tags
- propset for Id
arniml 5585d 14h /t48/tags/rel_1_4/rtl/vhdl/
292 New directory structure. root 5607d 23h /t48/tags/rel_1_4/rtl/vhdl/
291 remove t48_opc_decoder component reference arniml 5919d 12h /t48/tags/rel_1_4/rtl/vhdl/
290 remove obsolete components arniml 5920d 14h /t48/tags/rel_1_4/rtl/vhdl/
284 better support for ISE/XST:
opc_table and opc_decoder merged into decoder_pack and decoder
arniml 5922d 12h /t48/tags/rel_1_4/rtl/vhdl/
275 fix sensitivity list arniml 6421d 08h /t48/tags/rel_1_4/rtl/vhdl/
273 reset counter_q arniml 6438d 19h /t48/tags/rel_1_4/rtl/vhdl/
272 fix entity port names arniml 6442d 20h /t48/tags/rel_1_4/rtl/vhdl/
271 initial check-in arniml 6442d 20h /t48/tags/rel_1_4/rtl/vhdl/
270 fix component name arniml 6442d 21h /t48/tags/rel_1_4/rtl/vhdl/
262 name keyword added arniml 6578d 08h /t48/tags/rel_1_4/rtl/vhdl/
261 * name tag added
* restriction concerning expander port removed
arniml 6578d 08h /t48/tags/rel_1_4/rtl/vhdl/
249 Fix bug report
"Deassertion of PROG too early"
PROG is deasserted at end of XTAL3 now
arniml 6578d 08h /t48/tags/rel_1_4/rtl/vhdl/
247 initial check-in arniml 6578d 10h /t48/tags/rel_1_4/rtl/vhdl/
231 obsoleted by new memory concept arniml 6601d 08h /t48/tags/rel_1_4/rtl/vhdl/
227 replaced syn_ram and syn_rom with generic_ram_ena and t48_rom/t49_rom arniml 6601d 08h /t48/tags/rel_1_4/rtl/vhdl/
226 replaced syn_ram with generic_ram_ena arniml 6601d 08h /t48/tags/rel_1_4/rtl/vhdl/
225 replaced syn_rom and syn_ram with t48_rom and generic_ram_ena arniml 6601d 08h /t48/tags/rel_1_4/rtl/vhdl/
224 initial check-in arniml 6601d 08h /t48/tags/rel_1_4/rtl/vhdl/
222 add note about clock enable for data memory RAM macro arniml 6602d 08h /t48/tags/rel_1_4/rtl/vhdl/
221 new input xtal_en_i arniml 6602d 08h /t48/tags/rel_1_4/rtl/vhdl/
220 new input xtal_en_i arniml 6602d 09h /t48/tags/rel_1_4/rtl/vhdl/
219 new input xtal_en_i gates xtal_i base clock arniml 6602d 09h /t48/tags/rel_1_4/rtl/vhdl/
216 assign clk_i to outclock arniml 6819d 12h /t48/tags/rel_1_4/rtl/vhdl/
215 suppress p2_output_pch_o when MOVX operation is accessing the
external memory
arniml 6819d 12h /t48/tags/rel_1_4/rtl/vhdl/
214 fix sensitivity list arniml 6826d 14h /t48/tags/rel_1_4/rtl/vhdl/
213 properly drive P1 and P2 with low impedance markers arniml 6831d 10h /t48/tags/rel_1_4/rtl/vhdl/
211 wire signals for P2 low impedance marker issue arniml 6832d 12h /t48/tags/rel_1_4/rtl/vhdl/
210 entity changes for P2 low impedance marker issue arniml 6832d 12h /t48/tags/rel_1_4/rtl/vhdl/

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