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[/] [t6507lp/] - Rev 100

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Rev Log message Author Age Path
100 IDY WRITE TYPE instructions are coded and simulated. creep 5594d 22h /t6507lp/
99 Only Package.v should be used. creep 5594d 22h /t6507lp/
98 Updated status and some comments. creep 5594d 22h /t6507lp/
97 Removed obsolete TODO. creep 5594d 22h /t6507lp/
96 IDY READ TYPE instructions are coded and simulated.
IDY WRITE TYPE instructions are coded but still requires simulation.		 creep 5597d 14h /t6507lp/
95 IDX addressing mode is also 100%, coded and simulated. creep 5597d 18h /t6507lp/
94 Relative addressing mode is almost 100% functional.
It just needs another test to check if the adrres_plus_index logic is not recalculating the pc in two consecutive cycles.		 creep 5598d 14h /t6507lp/
93 Opcode for BNE was wrong. creep 5598d 16h /t6507lp/
92 Absolute indexed mode working properly. All cases were simulated. creep 5598d 21h /t6507lp/
91 Absolute indexed mode, READ_MODIFY_WRITE TYPE instruction when page IS crossed is coded and simulated. creep 5598d 21h /t6507lp/
90 CMP, CPX and CPY affect carry flag (in this case it indicates a borrow) but they don't affect overflow. gabrieloshiro 5598d 21h /t6507lp/
89 Absolute indexed mode, READ_MODIFY_WRITE TYPE instruction when page is NOT crossed is coded and simulated. creep 5598d 21h /t6507lp/
88 Absolute indexed mode, READ TYPE instruction when page IS crossed is coded and simulated. creep 5598d 22h /t6507lp/
87 Absolute indexed mode, READ TYPE instruction when no page is crossed is coded and simulated. creep 5599d 13h /t6507lp/
86 Zero page indexed mode is working fine. creep 5599d 17h /t6507lp/
85 alu_x and alu_y variables created. gabrieloshiro 5599d 22h /t6507lp/
84 X and Y register are passed from ALU to FSM. gabrieloshiro 5599d 22h /t6507lp/
83 Completed HAL checking. All the relevant warnings and errors were removed. creep 5599d 22h /t6507lp/
82 Did some checking with HAL and fixed 20+ warnings and errors. creep 5600d 14h /t6507lp/
81 Decimal mode (BCD) is working. gabrieloshiro 5600d 15h /t6507lp/
80 Grouping some instructions that have the same behavioral. gabrieloshiro 5600d 15h /t6507lp/
79 ALU testbench added. gabrieloshiro 5600d 16h /t6507lp/
78 ZPG coded and simulated. creep 5600d 16h /t6507lp/
77 ZPG coded. Simulation is halfway. creep 5600d 17h /t6507lp/
76 ABS write instructions were not simulated.
Also added some initial ZPG simulation.		 creep 5600d 17h /t6507lp/
75 First working version! gabrieloshiro 5600d 17h /t6507lp/
74 The file now describes who is doing what. creep 5600d 17h /t6507lp/
73 Added schedule file into the readme file. creep 5600d 17h /t6507lp/
72 Project management folder. creep 5600d 17h /t6507lp/
71 Four addressing modes are simulated: immediate, accumulator, implied and absolute.
The simulation was done using a testbench that contains a small memory inside.		 creep 5600d 18h /t6507lp/

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