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[/] [t6507lp/] [trunk/] [rtl/] - Rev 116

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Rev Log message Author Age Path
116 Changed the module instantiation into the dot form. creep 5614d 22h /t6507lp/trunk/rtl/
115 Renamed the signal control. It is mem_rw now. creep 5614d 22h /t6507lp/trunk/rtl/
114 Created a global timescale file for the project. Added to the top module. creep 5614d 22h /t6507lp/trunk/rtl/
113 Timescale was unified. gabrieloshiro 5614d 23h /t6507lp/trunk/rtl/
112 Created a global timescale file for the project. creep 5614d 23h /t6507lp/trunk/rtl/
111 Performed some linting after coding was finished. creep 5615d 14h /t6507lp/trunk/rtl/
110 All addressing modes and special instructions have been coded and simulated. The file still requires coments, linting and some coverage. creep 5615d 15h /t6507lp/trunk/rtl/
109 PLA and PLP are coded and simulated. creep 5615d 18h /t6507lp/trunk/rtl/
108 PHA and PHP are coded and simulated. creep 5615d 19h /t6507lp/trunk/rtl/
107 The RTS instruction is working fine. Coded and simulated. creep 5615d 20h /t6507lp/trunk/rtl/
106 First stable version. Things seems to be working. Simulation is currently at 20%. gabrieloshiro 5615d 20h /t6507lp/trunk/rtl/
105 The RTI instruction is working fine. Coded and simulated. creep 5615d 20h /t6507lp/trunk/rtl/
104 The BRK instruction is working. The reset vector was tested also. creep 5615d 22h /t6507lp/trunk/rtl/
103 Some early modifications to support the special stack instructions. creep 5616d 15h /t6507lp/trunk/rtl/
102 Some early modifications to support the special stack instructions. creep 5616d 18h /t6507lp/trunk/rtl/
101 Absolute indirect addressing mode is coded and simulated. creep 5616d 22h /t6507lp/trunk/rtl/
100 IDY WRITE TYPE instructions are coded and simulated. creep 5616d 23h /t6507lp/trunk/rtl/
99 Only Package.v should be used. creep 5616d 23h /t6507lp/trunk/rtl/
98 Updated status and some comments. creep 5616d 23h /t6507lp/trunk/rtl/
97 Removed obsolete TODO. creep 5616d 23h /t6507lp/trunk/rtl/
96 IDY READ TYPE instructions are coded and simulated.
IDY WRITE TYPE instructions are coded but still requires simulation.		 creep 5619d 15h /t6507lp/trunk/rtl/
95 IDX addressing mode is also 100%, coded and simulated. creep 5619d 18h /t6507lp/trunk/rtl/
94 Relative addressing mode is almost 100% functional.
It just needs another test to check if the adrres_plus_index logic is not recalculating the pc in two consecutive cycles.		 creep 5620d 15h /t6507lp/trunk/rtl/
93 Opcode for BNE was wrong. creep 5620d 17h /t6507lp/trunk/rtl/
92 Absolute indexed mode working properly. All cases were simulated. creep 5620d 21h /t6507lp/trunk/rtl/
91 Absolute indexed mode, READ_MODIFY_WRITE TYPE instruction when page IS crossed is coded and simulated. creep 5620d 21h /t6507lp/trunk/rtl/
90 CMP, CPX and CPY affect carry flag (in this case it indicates a borrow) but they don't affect overflow. gabrieloshiro 5620d 22h /t6507lp/trunk/rtl/
89 Absolute indexed mode, READ_MODIFY_WRITE TYPE instruction when page is NOT crossed is coded and simulated. creep 5620d 22h /t6507lp/trunk/rtl/
88 Absolute indexed mode, READ TYPE instruction when page IS crossed is coded and simulated. creep 5620d 23h /t6507lp/trunk/rtl/
87 Absolute indexed mode, READ TYPE instruction when no page is crossed is coded and simulated. creep 5621d 14h /t6507lp/trunk/rtl/

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