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[/] [t6507lp/] [trunk/] [rtl/] - Rev 77

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Rev Log message Author Age Path
77 ZPG coded. Simulation is halfway. creep 5584d 02h /t6507lp/trunk/rtl/
76 ABS write instructions were not simulated.
Also added some initial ZPG simulation.
creep 5584d 02h /t6507lp/trunk/rtl/
75 First working version! gabrieloshiro 5584d 02h /t6507lp/trunk/rtl/
71 Four addressing modes are simulated: immediate, accumulator, implied and absolute.
The simulation was done using a testbench that contains a small memory inside.
creep 5584d 03h /t6507lp/trunk/rtl/
70 Fixed several timing. Registered outputs working.
Only three adressing modes coded, the previous coding was erased.
creep 5587d 23h /t6507lp/trunk/rtl/
68 The FSM module is now parametrized.
Also, several changes were made to remove most of the lint warnings.
creep 5588d 02h /t6507lp/trunk/rtl/
67 File name change to lowercase. HAL says so! creep 5588d 03h /t6507lp/trunk/rtl/
66 File name change to lowercase. HAL says so! creep 5588d 03h /t6507lp/trunk/rtl/
65 Now the blocks are connected. gabrieloshiro 5588d 22h /t6507lp/trunk/rtl/
64 Constant were wrong. gabrieloshiro 5588d 22h /t6507lp/trunk/rtl/
63 Fixed several HAL warnings. Still plenty to do. creep 5588d 23h /t6507lp/trunk/rtl/
62 The DUT file name changed. creep 5588d 23h /t6507lp/trunk/rtl/
61 File name change to lowercase. HAL says so! creep 5588d 23h /t6507lp/trunk/rtl/
60 File name change. HAL says so! creep 5588d 23h /t6507lp/trunk/rtl/
59 I`ve fixed some latch creation. gabrieloshiro 5588d 23h /t6507lp/trunk/rtl/
58 ALU with all opcodes ready for simulation. gabrieloshiro 5589d 00h /t6507lp/trunk/rtl/
57 A very simple testbench that checks the execution for a single instruction, i.e. no memory. creep 5589d 00h /t6507lp/trunk/rtl/
56 Several changes in the output logic to respect the pipelining. creep 5589d 00h /t6507lp/trunk/rtl/
55 ALU has all opcodes now! Comments inside ALU are completely wrong. gabrieloshiro 5589d 01h /t6507lp/trunk/rtl/
54 Processor Status register modified. gabrieloshiro 5589d 04h /t6507lp/trunk/rtl/
53 Added default header. creep 5589d 08h /t6507lp/trunk/rtl/
52 Removed unecessary always block. creep 5589d 23h /t6507lp/trunk/rtl/
51 Some first ideas on testbench. creep 5589d 23h /t6507lp/trunk/rtl/
48 Updated reference to header file. creep 5590d 02h /t6507lp/trunk/rtl/
47 Added a new folder where the users should run the tools. creep 5590d 02h /t6507lp/trunk/rtl/
45 Removed the CVS $log tag. creep 5590d 02h /t6507lp/trunk/rtl/
44 Now it is compiling using ncvlog. creep 5590d 02h /t6507lp/trunk/rtl/
38 root 5591d 01h /t6507lp/trunk/rtl/
37 Some minor fixes. Now we are trying to make it synthesizable. gabrieloshiro 5591d 22h /trunk/rtl/
36 All module names are written using uppercase letters now. gabrieloshiro 5591d 23h /trunk/rtl/

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