OpenCores
URL https://opencores.org/ocsvn/tv80/tv80/trunk

Subversion Repositories tv80

[/] [tv80/] [trunk/] - Rev 108

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
108 Added environment parameter to control run time ghutchis 4867d 11h /tv80/trunk/
107 Fixed memory contention between config interface and TV80 during write ghutchis 4867d 20h /tv80/trunk/
106 Additional environment updates. Added sample source code for
application. Fixed memory overflow bug in load_ihex().
ghutchis 4867d 20h /tv80/trunk/
105 Fixed bugs after environment bringup ghutchis 4867d 21h /tv80/trunk/
104 Added basic SystemC environment for testing sample app ghutchis 4867d 21h /tv80/trunk/
103 Updated RTL syntax errors ghutchis 4868d 03h /tv80/trunk/
102 Added environment directory for "localcfg" sample app ghutchis 4868d 05h /tv80/trunk/
101 Added sample application for local config processor ghutchis 4868d 09h /tv80/trunk/
100 Changed do to dout in tv80n, checked in fix for flags bug ghutchis 4899d 08h /tv80/trunk/
99 Fixed setting of flags for LD A, I and LD A, R instructions

Added new testcase ivec_flags to cover new opcodes
ghutchis 4957d 05h /tv80/trunk/
98 Changed malloc for strings with constant length copy, add assertion checks for
null pointers in env memory, and fixed some formatting
ghutchis 5301d 22h /tv80/trunk/
97 Added data in mux, added 16450 UART to environment ghutchis 5306d 01h /tv80/trunk/
96 Added Z80 op decode to environment, enabled by -k switch ghutchis 5306d 07h /tv80/trunk/
95 Updated regression script to use SystemC simulation ghutchis 5308d 02h /tv80/trunk/
94 Ported over env_io.v from Verilog environment to tv_responder.
Basic tests from Verilog environment (hello, fib) now passing in
SystemC environment.
ghutchis 5310d 03h /tv80/trunk/
93 Added common header file for all systemc environment ghutchis 5311d 01h /tv80/trunk/
92 Added responder to top level, beginning of support for ihex load ghutchis 5315d 03h /tv80/trunk/
91 Preliminary support for SystemC/Verilator environment ghutchis 5315d 05h /tv80/trunk/
90 Fixed syntax errors in core preventing Verilator from compiling.
Added new capability to register generator to make registers which
latch on an external event. Removed spurious copyright notice.
ghutchis 5315d 05h /tv80/trunk/
89 RTL and environment fixes for nmi bug ghutchis 5335d 08h /tv80/trunk/
88 Fixed bug introduced by conversion of mcycle to one-hot FSM ghutchis 5336d 23h /tv80/trunk/
87 Added additional ifdef signals to remove unneede R (refresh) register ghutchis 5352d 06h /tv80/trunk/
84 New directory structure. root 5575d 18h /tv80/trunk/
83 Some fixes from Guy-- replace case with casex. hharte 5649d 00h /trunk/
82 Clean up spacing hharte 5658d 20h /trunk/
81 Initial version of TV80 Wishbone Wrapper hharte 5658d 20h /trunk/
80 Misc. code clean-up on mcode to make code smaller and (hopefully)
more readable.
ghutchis 6758d 09h /trunk/
79 Added JR self-checking test ghutchis 6758d 09h /trunk/
78 Hajime Ishitani pointed out missing invert on cs_n signal ghutchis 6801d 10h /trunk/
77 Added back files lost after server crash ghutchis 6833d 04h /trunk/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.