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[/] [usb_dongle_fpga/] [tags/] [version_1_5/] - Rev 45

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45 This commit was manufactured by cvs2svn to create tag 'version_1_5'. 5915d 07h /usb_dongle_fpga/tags/version_1_5/
36 Initial commit of EPCS1 (FPGA configuration memory) programmet to update dongle firmware nuubik 5950d 06h /usb_dongle_fpga/tags/version_1_5/
35 Fixed postcode nibbles swapped issue added D0 D11 commands for IO port 0x88
(enable/disable memory reads)		 nuubik 5950d 06h /usb_dongle_fpga/tags/version_1_5/
34 For download of v5 dongle tool and manual nuubik 5952d 07h /usb_dongle_fpga/tags/version_1_5/
33 For download of v5 web release nuubik 5952d 08h /usb_dongle_fpga/tags/version_1_5/
32 For download of v5 datasheet nuubik 5952d 08h /usb_dongle_fpga/tags/version_1_5/
31 Newest available schematic nuubik 5953d 01h /usb_dongle_fpga/tags/version_1_5/
30 Fixed some typos in document nuubik 5953d 01h /usb_dongle_fpga/tags/version_1_5/
29 Added link to cheap ($40) ByteBlaster clone cable to update notice and fix'ed help typo nuubik 5953d 01h /usb_dongle_fpga/tags/version_1_5/
28 Quartus project files for HW code 5 project files nuubik 5954d 02h /usb_dongle_fpga/tags/version_1_5/
27 Initial commit of post code logger block and fifo used in the logger nuubik 5954d 02h /usb_dongle_fpga/tags/version_1_5/
26 Added flash_sts status check as flash_sts pin works now (flas_sts had 2 inputs pins what caused it not to work propery now one is highZ output).
Added post code logger block and LPC IO write flow control and flash lock when flash is programmed		 nuubik 5954d 02h /usb_dongle_fpga/tags/version_1_5/
25 Added flash_sts status check as flash_sts pin works now (flas_sts had 2 inputs pins what caused it not to work propery now one is highZ output).
Added 64K byte block read when read length is 0		 nuubik 5954d 02h /usb_dongle_fpga/tags/version_1_5/
24 Added changes for new dongle HW code 5 features nuubik 5954d 02h /usb_dongle_fpga/tags/version_1_5/
23 Inlined dongle spesific Uspp code to dongle.py script separate Uspp is no longer needed.
Forced serial port to hw flow control mode.
Added support for new dongle HW code 5 to support fast read and fast write modes		 nuubik 5954d 02h /usb_dongle_fpga/tags/version_1_5/
22 Inlined dongle spesific Uspp code to dongle.py script separate Uspp is no longer needed nuubik 5954d 02h /usb_dongle_fpga/tags/version_1_5/
20 Fix'ed TAR cycle second part this is not critical update nuubik 5967d 05h /usb_dongle_fpga/tags/version_1_5/
19 Fix'ed cycle type init code copy/pase mistake nuubik 5967d 07h /usb_dongle_fpga/tags/version_1_5/
18 Fixed in reset init of some trigers (this should not have generated extra hardware in FPGA but just to be on the safe side) nuubik 5968d 06h /usb_dongle_fpga/tags/version_1_5/
17 changed version code to 04 and added spy mode by puting jumpers on header and also implemented LPC Firmware Hub read to enable this booting mode (selectable by header jumper see documentation) nuubik 5968d 07h /usb_dongle_fpga/tags/version_1_5/
16 Synchronisation with OpenCores release nuubik 6101d 03h /usb_dongle_fpga/tags/version_1_5/
15 changed version code to 03 and disabled spy mode on juper setting 00 (this disabled booting but postcode IO write was displayed) nuubik 6218d 06h /usb_dongle_fpga/tags/version_1_5/
14 added comment on POR time influence when booting from LPC dongle nuubik 6230d 05h /usb_dongle_fpga/tags/version_1_5/
12 Added windows py bindings check with nice info print with link to installer nuubik 6331d 23h /usb_dongle_fpga/tags/version_1_5/
11 one ; in line end possible runtime error nuubik 6331d 23h /usb_dongle_fpga/tags/version_1_5/
10 fixed a typo nuubik 6335d 21h /usb_dongle_fpga/tags/version_1_5/
9 Made failing on port open retry nuubik 6335d 21h /usb_dongle_fpga/tags/version_1_5/
8 Added PCB level test options nuubik 6336d 04h /usb_dongle_fpga/tags/version_1_5/
7 Fixed pin modes and resyntesized nuubik 6336d 04h /usb_dongle_fpga/tags/version_1_5/
6 Fixed Cyclon part no in datasheets and drawings nuubik 6373d 02h /usb_dongle_fpga/tags/version_1_5/

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