OpenCores
URL https://opencores.org/ocsvn/versatile_mem_ctrl/versatile_mem_ctrl/trunk

Subversion Repositories versatile_mem_ctrl

[/] [versatile_mem_ctrl/] [trunk/] - Rev 79

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
79 Added defines that fix bugs with slow wishbone clocks doing burst writes julius 5181d 14h /versatile_mem_ctrl/trunk/
78 Burst writing working again, although its mostly hardcoded to burst 4. Also added a fix for when the RAM and bus clocks are about the same speed, to avoid buffer overrun julius 5183d 21h /versatile_mem_ctrl/trunk/
77 SDR 16 registering of current_fifo_empty signal in top, appropriate control alterations in fsm_sdr_16 julius 5191d 20h /versatile_mem_ctrl/trunk/
76 Changed SDR16 synthesis useioff location, fsm_wb acking logic, default SDR build is for 16m part now julius 5196d 21h /versatile_mem_ctrl/trunk/
75 mikaeljf 5196d 22h /versatile_mem_ctrl/trunk/
74 Minor update of rtl Makefile. mikaeljf 5200d 21h /versatile_mem_ctrl/trunk/
73 Minor updates to fix lost revisions 69 and 70. mikaeljf 5200d 22h /versatile_mem_ctrl/trunk/
72 Restored lost revisions 69 and 70. mikaeljf 5200d 23h /versatile_mem_ctrl/trunk/
71 Replacing versatile_mem_ctrl_top with revisino 68 version but with top level ack fix. May lose some of revision 69 and 70 changes julius 5200d 23h /versatile_mem_ctrl/trunk/
70 mikaeljf 5204d 05h /versatile_mem_ctrl/trunk/
69 mikaeljf 5205d 02h /versatile_mem_ctrl/trunk/
68 cleaqnup unneback 5206d 14h /versatile_mem_ctrl/trunk/
67 added FSM for wb if unneback 5206d 14h /versatile_mem_ctrl/trunk/
66 unneback 5206d 17h /versatile_mem_ctrl/trunk/
65 added unneback 5206d 17h /versatile_mem_ctrl/trunk/
64 Changed sdr 16 FSM to use defines instead of parameters which were somehow screwing up synplify, reinstated used of sdr_16_defines.v file julius 5207d 17h /versatile_mem_ctrl/trunk/
63 Fixed a couple of sdr_16 bugs to do with tracking of opened banks julius 5208d 00h /versatile_mem_ctrl/trunk/
62 Added note to sdr_16_defines.v asking if it's still used julius 5208d 02h /versatile_mem_ctrl/trunk/
61 Fixed blocking/nonblocking assign issue in sdr_16 fsm julius 5212d 01h /versatile_mem_ctrl/trunk/
60 Added synthesis directives ensuring registering of right signals in IOBs for sdr16 controller. Removed comment stripping from vppreproc command for sdr_16 creation. julius 5212d 01h /versatile_mem_ctrl/trunk/
59 counter changed to shift register unneback 5212d 02h /versatile_mem_ctrl/trunk/
58 sdr_16 fixes for timing - extra egress register stage, appropriate changes in sdr_16 fsm julius 5213d 03h /versatile_mem_ctrl/trunk/
57 added support for early termination of burst access unneback 5214d 06h /versatile_mem_ctrl/trunk/
56 corrected fifo_rd_data in state w4d unneback 5215d 23h /versatile_mem_ctrl/trunk/
55 Fixed up sdr16 dqm output julius 5216d 17h /versatile_mem_ctrl/trunk/
54 dqm moved into FSM unneback 5217d 14h /versatile_mem_ctrl/trunk/
53 unneback 5217d 15h /versatile_mem_ctrl/trunk/
52 act exit for read updated unneback 5218d 16h /versatile_mem_ctrl/trunk/
51 act exit for read updated unneback 5218d 16h /versatile_mem_ctrl/trunk/
50 Fixed up make file - THIS MAY BREAK THINGS, but it's a lot neater and easier to use, also dependencies are now properly configured, and we don't remake things unecessarily julius 5218d 19h /versatile_mem_ctrl/trunk/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.