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Subversion Repositories versatile_mem_ctrl

[/] [versatile_mem_ctrl/] [trunk/] - Rev 86

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Rev Log message Author Age Path
86 mikaeljf 5100d 21h /versatile_mem_ctrl/trunk/
85 Added a versatile_mem_ctrl specific version of the flag generation module in the versatile fifo. mikaeljf 5101d 21h /versatile_mem_ctrl/trunk/
84 mikaeljf 5105d 20h /versatile_mem_ctrl/trunk/
83 mikaeljf 5106d 15h /versatile_mem_ctrl/trunk/
82 mikaeljf 5106d 20h /versatile_mem_ctrl/trunk/
81 mikaeljf 5107d 16h /versatile_mem_ctrl/trunk/
80 mikaeljf 5107d 17h /versatile_mem_ctrl/trunk/
79 Added defines that fix bugs with slow wishbone clocks doing burst writes julius 5145d 07h /versatile_mem_ctrl/trunk/
78 Burst writing working again, although its mostly hardcoded to burst 4. Also added a fix for when the RAM and bus clocks are about the same speed, to avoid buffer overrun julius 5147d 14h /versatile_mem_ctrl/trunk/
77 SDR 16 registering of current_fifo_empty signal in top, appropriate control alterations in fsm_sdr_16 julius 5155d 12h /versatile_mem_ctrl/trunk/
76 Changed SDR16 synthesis useioff location, fsm_wb acking logic, default SDR build is for 16m part now julius 5160d 13h /versatile_mem_ctrl/trunk/
75 mikaeljf 5160d 14h /versatile_mem_ctrl/trunk/
74 Minor update of rtl Makefile. mikaeljf 5164d 13h /versatile_mem_ctrl/trunk/
73 Minor updates to fix lost revisions 69 and 70. mikaeljf 5164d 14h /versatile_mem_ctrl/trunk/
72 Restored lost revisions 69 and 70. mikaeljf 5164d 15h /versatile_mem_ctrl/trunk/
71 Replacing versatile_mem_ctrl_top with revisino 68 version but with top level ack fix. May lose some of revision 69 and 70 changes julius 5164d 16h /versatile_mem_ctrl/trunk/
70 mikaeljf 5167d 22h /versatile_mem_ctrl/trunk/
69 mikaeljf 5168d 19h /versatile_mem_ctrl/trunk/
68 cleaqnup unneback 5170d 07h /versatile_mem_ctrl/trunk/
67 added FSM for wb if unneback 5170d 07h /versatile_mem_ctrl/trunk/
66 unneback 5170d 10h /versatile_mem_ctrl/trunk/
65 added unneback 5170d 10h /versatile_mem_ctrl/trunk/
64 Changed sdr 16 FSM to use defines instead of parameters which were somehow screwing up synplify, reinstated used of sdr_16_defines.v file julius 5171d 09h /versatile_mem_ctrl/trunk/
63 Fixed a couple of sdr_16 bugs to do with tracking of opened banks julius 5171d 17h /versatile_mem_ctrl/trunk/
62 Added note to sdr_16_defines.v asking if it's still used julius 5171d 19h /versatile_mem_ctrl/trunk/
61 Fixed blocking/nonblocking assign issue in sdr_16 fsm julius 5175d 17h /versatile_mem_ctrl/trunk/
60 Added synthesis directives ensuring registering of right signals in IOBs for sdr16 controller. Removed comment stripping from vppreproc command for sdr_16 creation. julius 5175d 17h /versatile_mem_ctrl/trunk/
59 counter changed to shift register unneback 5175d 19h /versatile_mem_ctrl/trunk/
58 sdr_16 fixes for timing - extra egress register stage, appropriate changes in sdr_16 fsm julius 5176d 20h /versatile_mem_ctrl/trunk/
57 added support for early termination of burst access unneback 5177d 22h /versatile_mem_ctrl/trunk/

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