URL https://opencores.org/ocsvn/versatile_mem_ctrl/versatile_mem_ctrl/trunk

Subversion Repositories versatile_mem_ctrl

[/] [versatile_mem_ctrl/] [trunk/] [rtl/] - Rev 79

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Rev	Log message	Author	Age	Path
79	Added defines that fix bugs with slow wishbone clocks doing burst writes	julius	5181d 11h	/versatile_mem_ctrl/trunk/rtl/
78	Burst writing working again, although its mostly hardcoded to burst 4. Also added a fix for when the RAM and bus clocks are about the same speed, to avoid buffer overrun	julius	5183d 18h	/versatile_mem_ctrl/trunk/rtl/
77	SDR 16 registering of current_fifo_empty signal in top, appropriate control alterations in fsm_sdr_16	julius	5191d 16h	/versatile_mem_ctrl/trunk/rtl/
76	Changed SDR16 synthesis useioff location, fsm_wb acking logic, default SDR build is for 16m part now	julius	5196d 17h	/versatile_mem_ctrl/trunk/rtl/
75		mikaeljf	5196d 18h	/versatile_mem_ctrl/trunk/rtl/
74	Minor update of rtl Makefile.	mikaeljf	5200d 17h	/versatile_mem_ctrl/trunk/rtl/
73	Minor updates to fix lost revisions 69 and 70.	mikaeljf	5200d 18h	/versatile_mem_ctrl/trunk/rtl/
72	Restored lost revisions 69 and 70.	mikaeljf	5200d 19h	/versatile_mem_ctrl/trunk/rtl/
71	Replacing versatile_mem_ctrl_top with revisino 68 version but with top level ack fix. May lose some of revision 69 and 70 changes	julius	5200d 20h	/versatile_mem_ctrl/trunk/rtl/
70		mikaeljf	5204d 02h	/versatile_mem_ctrl/trunk/rtl/
69		mikaeljf	5204d 23h	/versatile_mem_ctrl/trunk/rtl/
68	cleaqnup	unneback	5206d 11h	/versatile_mem_ctrl/trunk/rtl/
67	added FSM for wb if	unneback	5206d 11h	/versatile_mem_ctrl/trunk/rtl/
66		unneback	5206d 14h	/versatile_mem_ctrl/trunk/rtl/
65	added	unneback	5206d 14h	/versatile_mem_ctrl/trunk/rtl/
64	Changed sdr 16 FSM to use defines instead of parameters which were somehow screwing up synplify, reinstated used of sdr_16_defines.v file	julius	5207d 13h	/versatile_mem_ctrl/trunk/rtl/
63	Fixed a couple of sdr_16 bugs to do with tracking of opened banks	julius	5207d 21h	/versatile_mem_ctrl/trunk/rtl/
62	Added note to sdr_16_defines.v asking if it's still used	julius	5207d 23h	/versatile_mem_ctrl/trunk/rtl/
61	Fixed blocking/nonblocking assign issue in sdr_16 fsm	julius	5211d 21h	/versatile_mem_ctrl/trunk/rtl/
60	Added synthesis directives ensuring registering of right signals in IOBs for sdr16 controller. Removed comment stripping from vppreproc command for sdr_16 creation.	julius	5211d 21h	/versatile_mem_ctrl/trunk/rtl/
59	counter changed to shift register	unneback	5211d 23h	/versatile_mem_ctrl/trunk/rtl/
58	sdr_16 fixes for timing - extra egress register stage, appropriate changes in sdr_16 fsm	julius	5213d 00h	/versatile_mem_ctrl/trunk/rtl/
57	added support for early termination of burst access	unneback	5214d 02h	/versatile_mem_ctrl/trunk/rtl/
56	corrected fifo_rd_data in state w4d	unneback	5215d 19h	/versatile_mem_ctrl/trunk/rtl/
55	Fixed up sdr16 dqm output	julius	5216d 13h	/versatile_mem_ctrl/trunk/rtl/
54	dqm moved into FSM	unneback	5217d 11h	/versatile_mem_ctrl/trunk/rtl/
53		unneback	5217d 11h	/versatile_mem_ctrl/trunk/rtl/
52	act exit for read updated	unneback	5218d 12h	/versatile_mem_ctrl/trunk/rtl/
51	act exit for read updated	unneback	5218d 12h	/versatile_mem_ctrl/trunk/rtl/
50	Fixed up make file - THIS MAY BREAK THINGS, but it's a lot neater and easier to use, also dependencies are now properly configured, and we don't remake things unecessarily	julius	5218d 15h	/versatile_mem_ctrl/trunk/rtl/

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Subversion Repositories versatile_mem_ctrl

[/] [versatile_mem_ctrl/] [trunk/] [rtl/] - Rev 79

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