URL https://opencores.org/ocsvn/xge_mac/xge_mac/trunk

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[/] [xge_mac/] [trunk/] - Rev 25

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Rev	Log message	Author	Age	Path
25	Timing improvements, reduced FIFO size from 1024 to 512	antanguay	4244d 18h	/xge_mac/trunk/
24	Use FIFO's for statistics clock domain crossing	antanguay	4244d 20h	/xge_mac/trunk/
23	Adding basic packet stats	antanguay	4245d 02h	/xge_mac/trunk/
22	Added prototype system verilog testbench	antanguay	4246d 23h	/xge_mac/trunk/
21	Improvements for timing, adding alternate FIFO design using XIL define	antanguay	4246d 23h	/xge_mac/trunk/
20	Updates for Xilinx synthesis	antanguay	4536d 17h	/xge_mac/trunk/
19	Updates for 32/64 bit systems	antanguay	4711d 18h	/xge_mac/trunk/
18	Updates for linux 32-bit	antanguay	4712d 15h	/xge_mac/trunk/
17	Fixed deprecated SystemC warnings	antanguay	4714d 23h	/xge_mac/trunk/
16	Rename tb_xge_mac.v to sv extension to fix issue with newer Modelsim	antanguay	4715d 05h	/xge_mac/trunk/
15	Updated for Verilator 3.813	antanguay	4734d 06h	/xge_mac/trunk/
14	Change interface to big endian, added serdes examples to testbench	antanguay	5323d 00h	/xge_mac/trunk/
13	Change interface to big endian, added serdes examples to testbench	antanguay	5323d 01h	/xge_mac/trunk/
12	Change interface to big endian, added serdes examples to testbench	antanguay	5323d 01h	/xge_mac/trunk/
11	Fixed clock crossing	antanguay	5428d 22h	/xge_mac/trunk/
10	Added details to spec	antanguay	5526d 17h	/xge_mac/trunk/
7	New directory structure.	root	5601d 10h	/xge_mac/trunk/
6	Updated spec. Added mod[2:0] signals. Timing improvements.	antanguay	5877d 18h	/trunk/
5	Fixed compilation	antanguay	5883d 18h	/trunk/
4	Created	antanguay	5883d 21h	/trunk/
2	Initial revision	antanguay	5883d 22h	/trunk/
1	Standard project directories initialized by cvs2svn.		5883d 22h	/trunk/

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[/] [xge_mac/] [trunk/] - Rev 25

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