OpenCores
URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] - Rev 52

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Rev Log message Author Age Path
52 fix bugs simont 7935d 05h /
51 fix bugs simont 7937d 09h /
50 fix bugs simont 7937d 10h /
49 verification added simont 7944d 10h /
48 added program for rom converting simont 7952d 06h /
47 remove unused files simont 7952d 06h /
46 prepared header simont 7952d 06h /
45 prepared header simont 7952d 06h /
44 prepared header simont 7952d 07h /
43 remove unused files simont 7952d 08h /
42 *** empty log message *** simont 7952d 08h /
41 remove unused files simont 7952d 08h /
40 added sigals for interacting with external ram simont 7972d 10h /
39 added signals ack, stb and cyc simont 7979d 08h /
38 fix some bugs simont 7979d 08h /
37 added signals ack, stb and cyc simont 7979d 08h /
36 fix bugs in mode 0 simont 7979d 08h /
35 design docunemt simont 7980d 07h /
34 specification docunemt simont 7980d 07h /
33 fix some bugs simont 7980d 12h /
32 overflow repaired simont 7980d 13h /
31 fix some bugs simont 7987d 05h /
30 mode 1 and 3 divide clooak with 31 or 16, mode 2 with 64 or 32 simont 7990d 11h /
29 fix some bugs simont 7990d 12h /
28 remove syn signal simont 7990d 12h /
27 fix some bugs simont 7990d 13h /
26 main divider logic was optimized not optimized by compiler, so I did it by hand markom 7990d 14h /
25 divider and multiplier pass test markom 7991d 09h /
24 intensively tests all instructions markom 7991d 14h /
23 mul & div use 4 clocks simont 7992d 04h /

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