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[/] - Rev 105

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Rev	Log message	Author	Age	Path
105	Patch interrupt bug.	sybreon	6043d 18h	/
104	Uses multiplier + barrel shifter as default.	sybreon	6045d 03h	/
103	Patched problem where memory access followed by dual cycle instructions were not stalling correctly (submitted by M. Ettus)	sybreon	6045d 03h	/
102	Fix MTS during interrupt vectoring bug (reported by M. Ettus).	sybreon	6045d 03h	/
101	Made multiplier pause with pipeline	sybreon	6055d 00h	/
100	multiplier issues	sybreon	6055d 00h	/
99	Minor cleanup	sybreon	6066d 19h	/
98	Minor typo	sybreon	6066d 22h	/
97	Added malloc() test	sybreon	6066d 22h	/
96	Stalls pipeline on MUL/BSF instructions results in minor speed improvements.	sybreon	6069d 21h	/
95	Abstracted simulation kernel (aeMB_sim) to split simulation models from synthesis models.	sybreon	6071d 23h	/
94	Prevent fHZD & rBRA[1]	sybreon	6073d 21h	/
93	Minor enable fix	sybreon	6073d 21h	/
92	Partitioned simulation model.	sybreon	6077d 00h	/
91	Made idle thread PC track main PC.	sybreon	6078d 06h	/
90	Fixed Carry bit bug.	sybreon	6078d 06h	/
89	Changed simulation kernel.	sybreon	6078d 06h	/
88	Minor optimisations.	sybreon	6078d 23h	/
87	Made T0 loop.	sybreon	6079d 16h	/
86	Some optimisations.	sybreon	6079d 16h	/
85	Replaced OF/ID blocks with combined block.	sybreon	6079d 16h	/
84	Added interrupt support.	sybreon	6079d 16h	/
83	Combined ID/OF blocks.	sybreon	6079d 16h	/
82	Further optimisations (speed + size).	sybreon	6081d 22h	/
81	Code cleanup + minor speed regression.	sybreon	6081d 23h	/
80	Minor optimisations (~10% faster)	sybreon	6083d 00h	/
79	Modified for AEMB2	sybreon	6084d 19h	/
78	initial import	sybreon	6084d 19h	/
77	This commit was manufactured by cvs2svn to create branch 'AEMB2_712'.		6088d 00h	/
76	initial	sybreon	6088d 00h	/

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[/] - Rev 105

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