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Rev Log message Author Age Path
143 Bit acceptance_filter_mode was inverted. igorm 7314d 23h /
142 This commit was manufactured by cvs2svn to create tag 'rel_20'. 7333d 21h /
141 Core improved to pass all tests with the Bosch VHDL Reference system. igorm 7333d 21h /
140 I forgot to thange one signal name. igorm 7388d 20h /
139 Signal bus_off_on added. igorm 7388d 20h /
138 Header changed. Address latched to posedge. bus_off_on signal added. mohor 7427d 22h /
137 Header changed. mohor 7427d 23h /
136 Error counters changed. mohor 7427d 23h /
135 Header changed. mohor 7427d 23h /
134 Active high/low problem when Altera devices are used. Bug fixed by
Rojhalat Ibrahim.
mohor 7535d 20h /
133 This commit was manufactured by cvs2svn to create tag 'rel_19'. 7542d 07h /
132 This commit was manufactured by cvs2svn to create tag 'asyst_3'. 7542d 07h /
131 This commit was manufactured by cvs2svn to create tag 'asyst_2'. 7542d 07h /
130 mbist signals updated according to newest convention markom 7542d 07h /
129 Error counters changed. mohor 7558d 16h /
128 This commit was manufactured by cvs2svn to create tag 'rel_18'. 7558d 16h /
127 Fixing the core to be Bosch VHDL Reference compatible. mohor 7558d 16h /
126 Error counters fixed to be compatible with Bosch VHDL reference model.
Small synchronization changes.
mohor 7559d 12h /
125 Synchronization changed, error counters fixed. mohor 7563d 18h /
124 ALTERA_RAM supported. mohor 7584d 01h /
123 This commit was manufactured by cvs2svn to create tag 'rel_17'. 7591d 06h /
122 This commit was manufactured by cvs2svn to create tag 'rel_16'. 7591d 06h /
121 When detecting bus-free, signal bus_free_cnt_en was cleared to zero
although the last sampled bit was zero instead of one.
mohor 7591d 06h /
120 This commit was manufactured by cvs2svn to create tag 'rel_15'. 7600d 03h /
119 Artisan RAMs added. mohor 7600d 03h /
118 Artisan RAM fixed (when not using BIST). mohor 7600d 03h /
117 Tristate signal tx_o is separated to tx_o and tx_oen_o. Both signals need
to be joined together on higher level.
mohor 7600d 03h /
116 This commit was manufactured by cvs2svn to create tag 'rel_14'. 7605d 21h /
115 Artisan ram instances added. simons 7605d 21h /
114 This commit was manufactured by cvs2svn to create tag 'rel_13'. 7632d 22h /

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