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Rev	Log message	Author	Age	Path
48	Actel APA ram supported.	mohor	7802d 22h	/
47	Data is latched on read.	mohor	7802d 22h	/
46	This commit was manufactured by cvs2svn to create tag 'rel_1'.		7812d 21h	/
45	When a dominant bit was detected at the third bit of the intermission and node had a message to transmit, bit_stuff error could occur. Fixed.	mohor	7812d 21h	/
44	When bit error occured while active error flag was transmitted, counter was not incremented.	mohor	7812d 22h	/
43	Directory keeper.	mohor	7813d 04h	/
42	Initial version of the project.	mohor	7813d 04h	/
41	Incomplete sensitivity list fixed.	mohor	7813d 06h	/
40	Typo fixed.	mohor	7813d 06h	/
39	CAN core finished. Host interface added. Registers finished. Synchronization to the wishbone finished.	mohor	7813d 07h	/
38	Temporary backup version (still fully operable).	mohor	7814d 21h	/
37	Define CAN_CLOCK_DIVIDER_MODE not used any more. Deleted.	mohor	7814d 21h	/
36	Most of the registers added. Registers "arbitration lost capture", "error code capture" + few more still need to be added.	mohor	7814d 21h	/
35	Several registers added. Not finished, yet.	mohor	7818d 01h	/
34	Errors monitoring improved. arbitration_lost improved.	mohor	7820d 07h	/
33	abort_tx added.	mohor	7820d 07h	/
32	abort_tx added. Bit destuff fixed.	mohor	7820d 07h	/
31	Wishbone interface added.	mohor	7821d 20h	/
30	CAN is working according to the specification. WB interface and more registers (status, IRQ, ...) needs to be added.	mohor	7822d 05h	/
29	Overload fixed. Hard synchronization also enabled at the last bit of interframe.	mohor	7823d 03h	/
28	Bosch license warning added. Error counters finished. Overload frames still need to be fixed.	mohor	7823d 19h	/
27	This file is not used.	mohor	7828d 04h	/
26	Backup.	mohor	7828d 04h	/
25	* empty log message *	mohor	7828d 07h	/
24	backup.	mohor	7832d 20h	/
23	Fifo corrected to be synthesizable.	mohor	7846d 04h	/
22	Form error supported. When receiving messages, last bit of the end-of-frame does not generate form error. Receiver goes to the idle mode one bit sooner. (CAN specification ver 2.0, part B, page 57).	mohor	7847d 08h	/
21	Data is stored to fifo at the end of ack stage.	mohor	7847d 23h	/
20	CRC checking fixed (when bitstuff occurs at the end of a CRC sequence).	mohor	7848d 00h	/
19	RX state machine fixed to receive "remote request" frames correctly. No data bytes are written to fifo when such frames are received.	mohor	7848d 07h	/

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