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Rev Log message Author Age Path
66 This commit was manufactured by cvs2svn to create tag 'rel_7'. 7581d 21h /
65 WB_CNTL register added, some syncronization fixes. simons 7581d 21h /
64 This commit was manufactured by cvs2svn to create tag 'rel_6'. 7601d 22h /
63 Three more chains added for cpu debug access. simons 7601d 22h /
62 This commit was manufactured by cvs2svn to create tag 'rel_5'. 7629d 22h /
61 Lapsus fixed. simons 7629d 22h /
60 This commit was manufactured by cvs2svn to create tag 'rel_4'. 7629d 22h /
59 Reset value for riscsel register set to 1. simons 7629d 22h /
58 This commit was manufactured by cvs2svn to create tag 'rel_3'. 7630d 00h /
57 Multiple cpu support added. simons 7630d 00h /
56 Revision 1.6. Trst changed to active high !!!. In order to be compliant with the
standard, reset needs to be negated on the upper layer.
mohor 7896d 20h /
55 Revision 1.6. Trst changed to active high !!!. In order to be compliant with the
standard, reset needs to be negated on the upper layer.
mohor 7896d 20h /
54 This commit was manufactured by cvs2svn to create tag 'rel_2'. 7896d 21h /
53 Trst active high. Inverted on higher layer. mohor 7896d 21h /
52 Trst signal is not inverted here any more. Inverted on higher layer !!!. mohor 7896d 22h /
51 WISHBONE Scan Chain is changed to reflect state of the WISHBONE access (WBInProgress bit added). Internal counter is used (counts 256 wb_clk cycles) and when counter exceeds that value, wb_cyc_o is negated. mohor 7924d 09h /
50 Revision 1.5 of the document ready. WISHBONE Scan Chain changed. mohor 7924d 10h /
49 This commit was manufactured by cvs2svn to create tag 'sdram_test_working'. 8079d 21h /
48 This commit was manufactured by cvs2svn to create tag 'rel_1'. 8079d 21h /
47 mon_cntl_o signals that controls monitor mux added. mohor 8079d 21h /
46 Asynchronous reset used instead of synchronous. mohor 8088d 03h /
45 tdo_padoen_o changed to tdo_padoe_o. Signal is active high. mohor 8094d 23h /
44 Signal names changed to lower case. mohor 8094d 23h /
43 Intentional error removed. mohor 8099d 23h /
42 A block for checking possible simulation/synthesis missmatch added. mohor 8100d 01h /
41 Function changed to logic because of some synthesis warnings. mohor 8107d 22h /
40 Signal tdo_padoe_o changed back to tdo_padoen_o. mohor 8121d 22h /
39 tdo_padoen_o changed to tdo_padoe_o. Signal was always active high, just
not named correctly.
mohor 8122d 23h /
38 Few outputs for boundary scan chain added. mohor 8135d 21h /
37 tap_top and dbg_top modules are put into two separate modules. tap_top
contains only tap state machine and related logic. dbg_top contains all
logic necessery for debugging.
mohor 8136d 01h /

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