OpenCores
URL https://opencores.org/ocsvn/eco32/eco32/trunk

Subversion Repositories eco32

[/] - Rev 182

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
182 monitor, several changes hellwig 3637d 21h /
181 hardware got BadAccess register; synthesizer result eco32.bit now included hellwig 3640d 11h /
180 monitor recognizes BadAccess register hellwig 3641d 20h /
179 even more NetBSD init tests hellwig 3651d 06h /
178 more NetBSD init tests hellwig 3655d 21h /
177 more NetBSD init tests hellwig 3657d 16h /
176 NetBSD tests updated hellwig 3657d 18h /
175 another NetBSD init test hellwig 3662d 14h /
174 NetBSD makefs recognizes specfile hellwig 3663d 17h /
173 another test program for the emerging NetBSD port hellwig 3664d 20h /
172 os-bin/NetBSD/init_04: .bss moved to correct place hellwig 3674d 11h /
171 NetBSD tests (init_xx) updated hellwig 3679d 11h /
170 text file added to NetBSD file system hellwig 3680d 18h /
169 more test programs for the emerging NetBSD port hellwig 3680d 18h /
168 simulator got BadAccess register hellwig 3686d 20h /
167 fs-NetBSD/makefs.c: eliminated unused variable hellwig 3689d 17h /
166 sim/mmu.c: simplified assocDelay hellwig 3689d 17h /
165 building NetBSD filesystem hellwig 3705d 19h /
164 NetBSD/sbin removed hellwig 3705d 19h /
163 NetBSD/sbin/init_00 removed hellwig 3705d 19h /
162 NetBSD: sbin with init_00 added hellwig 3708d 11h /
161 -m32 flag added for compiling lcc hellwig 3717d 13h /
160 fs-NetBSD/dsklbl.c: emit warning that checksum may have been re-computed hellwig 3732d 12h /
159 console display: proper name, run-sim: more memory and two terminals hellwig 3747d 19h /
158 bump version number to 0.24 hellwig 3779d 10h /
157 tagging eco32-0.23 hellwig 3779d 10h /
156 history update hellwig 3779d 11h /
155 hwtests: kbdtest README hellwig 3779d 17h /
154 hwtests: jalrtest README hellwig 3779d 20h /
153 hwtests: dsptest README hellwig 3780d 07h /

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.