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Subversion Repositories eco32

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Rev Log message Author Age Path
308 multicycle design, suitable for being verilated hellwig 3242d 20h /
307 several tests got duration.dat files hellwig 3243d 10h /
306 tool to show display output added hellwig 3243d 17h /
305 tool to show serial output added hellwig 3243d 18h /
304 Makefile updated hellwig 3246d 04h /
303 multicycle simulation control files added hellwig 3246d 04h /
302 tests updated hellwig 3246d 09h /
301 multicycle simulation source files added hellwig 3246d 17h /
300 memdelay experiment code looking better now hellwig 3246d 17h /
299 s3e-500 dac simulation corrected hellwig 3246d 18h /
298 xsa-xst-3 dac simulation corrected hellwig 3246d 19h /
297 memdelay experiment added hellwig 3246d 20h /
296 memspeed experiment added hellwig 3247d 08h /
295 tests for FPGA implementations hellwig 3247d 19h /
294 avoid ptrdiff_t warning in cpp, again hellwig 3249d 05h /
293 avoid ptrdiff_t warning in cpp hellwig 3249d 05h /
292 directory structure for FPGA implementations and simulations hellwig 3249d 10h /
291 avoid timing violations in DDR RAM circuit, new .bit files generated hellwig 3249d 11h /
290 Wishbone-compatible bus signals hellwig 3251d 11h /
289 new directory structure within fpga hellwig 3252d 08h /
288 new directory structure within fpga hellwig 3252d 09h /
287 new directory structure within fpga hellwig 3252d 09h /
286 AUTHORS file updated hellwig 3252d 09h /
285 simulator: 30 bit physical addresses hellwig 3260d 04h /
284 vcdchk tool added hellwig 3260d 13h /
283 bin2dat tool added hellwig 3260d 13h /
282 AUTHORS file updated hellwig 3278d 20h /
281 wishbone spec added hellwig 3357d 18h /
280 new standalone program: dhrystone hellwig 3360d 15h /
279 additional EOS32 disk partition, again hellwig 3365d 19h /

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