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Rev Log message Author Age Path
287 Fixed mangled comments and revisioning dates. jshamlet 1153d 23h /
286 Added initial cut of a "universal" character LCD driver. Allows for adjustment of address setup, enable high, and cycle times. Also has built-in timers for handling timing on certain commands. jshamlet 1154d 00h /
285 Added checksum byte to vector tx/rx to avoid issues with serial line noise glitching the receiver. Also modified the transmitted to take any generic argument, rather than canned arguments. jshamlet 1161d 03h /
284 Corrected the vhdl unit name and description for o8_7seg.vhd jshamlet 1274d 14h /
283 Altered SDLC bitclock check on TX to NOT block when tested by software, but to instead ignore packet write requests if BClk_Okay is low. This allows software to continue checking BClk_Okay in a polling loop. jshamlet 1278d 01h /
282 Modified the SDLC core transmit states to have consistent naming. jshamlet 1278d 02h /
281 Added pre-initialization to the dual-port RAM signals. jshamlet 1278d 04h /
280 Got rid of silly aliases that connected the dual-port memory and the arbitration logic. jshamlet 1278d 05h /
279 More comment cleanup jshamlet 1279d 02h /
278 Flattened the SDLC interface to fewer files and eliminated the package file. jshamlet 1279d 20h /
277 Fixed documentation errors related to flags. The UPP ALU instruction only alters the C flag, not the Z or N flags. This implies that using indexed loads or stores with auto post-increment will potentially alter the C flag. jshamlet 1280d 02h /
276 More comment fixes jshamlet 1314d 23h /
275 Fixed a minor comment error. jshamlet 1316d 17h /
274 Updated comments with more corrections jshamlet 1317d 00h /
273 Updated comments with corrections jshamlet 1317d 01h /
272 Updated the HTML documentation to reflect the removed generic. jshamlet 1327d 01h /
271 Removed deleted generic define. jshamlet 1327d 01h /
270 Moved CPU internal constants to o8_cpu.vhd and replace the generic that set the RSP direction flag with a constant instead. This removes the need to expose internal architectural flags externally.

Also added a hard-coded version register that takes a major and minor value as bytes using generics. This is a read-only register to the CPU.
jshamlet 1327d 01h /
269 Modified the write data path to use separate enumerated states rather than reuse the .reg field to improve performance. jshamlet 1329d 14h /
268 Added a 16-input external interrupt manager and dedicated SPI tx-only transmitter (for use with DACs, etc.). Also updated the soft-DACs with cleaned up HDL. jshamlet 1329d 15h /
267 Corrected the file description to indicate this is an example package. jshamlet 1329d 15h /
266 Accidentally uploaded incorrect example file for Open8_cfg.vhd jshamlet 1329d 15h /
265 Fixed a bug where "reg" wasn't being initialized with Poly_Init at reset. jshamlet 1422d 00h /
264 Updated comments jshamlet 1431d 21h /
263 Fixed a very old bug in the CPU core where autoincrements weren't affecting the upper register in the pair, causing it to loop around the lower 256 bytes. This only affected LDX/LDO, as the proper ALU signals were being generated in STO/STX and UPP. Wow, that bug has been in there for AGES.

Also separated the SDLC TX and RX interrupts so that they could be handled separately.
jshamlet 1431d 21h /
262 Added comments to LCD controllers - specifically that reading either register 0 or 1 will return the ready status. This code was already present, but not mentioned in the register map. jshamlet 1441d 01h /
261 Increased delay timer to 7 bits for button press detection. jshamlet 1448d 01h /
260 Added missing comments for Sequential_Interrupts generic, as well as comments explaining portions of the CPU operations. jshamlet 1461d 00h /
259 Fixed issue where Write_Fault wasn't defaulting to '0' when Write_Protect was set to FALSE,
Added a pulse interval measurement entity,
Fixed comments.
jshamlet 1461d 01h /
258 Fixed write bug in o8_ltc2355_2p.vhd, added a newer Open8_cfg.vhd, and the sys_tick.vhd utility entity. jshamlet 1461d 23h /

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