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Rev Log message Author Age Path
71 Update the FPGA example projects with the newer openMSP430 core including the hardware multiplier. olivier.girard 5245d 12h /
70 Add Area and Speed documentation. olivier.girard 5245d 15h /
69 Update HTML documentation with 16x16 hardware multiplier info. olivier.girard 5245d 20h /
68 Update synthesis scripts with the hardware multiplier support. olivier.girard 5245d 20h /
67 Added 16x16 Hardware Multiplier. olivier.girard 5245d 20h /
66 The peripheral templates are now under BSD license.
Developers of new peripherals based on these templates won't have to disclose their code.		 olivier.girard 5246d 00h /
65 Add possibility to disable waveform dumping by setting the OMSP_NODUMP environment variable to 1. olivier.girard 5256d 11h /
64 Add Actel synthesis environment for size and speed analysis. olivier.girard 5266d 20h /
63 Add Altera synthesis environment for size and speed analysis. olivier.girard 5266d 20h /
62 Add Xilinx synthesis environment for size&speed analysis. olivier.girard 5266d 22h /
61 Update openMSP430 rtl. olivier.girard 5277d 10h /
60 Cleanup of the PC (R0) generation logic.
Formal equivalence was shown between the new and old code with Synopsys' Formality (to make sure that nothing has been broken :-P ).		 olivier.girard 5277d 11h /
59 Update the FPGA projects with the latest core design updates. olivier.girard 5279d 09h /
58 Update the debug hardware breakpoint verification patterns to reflect the latest design updates. olivier.girard 5279d 09h /
57 Update design to exclude the range mode from the debug hardware breakpoint units. As this feature is not used by GDB, it has been disabled in order to improve the timings and save a bit of area/utilisation.
Note that if required, this feature can be re-enabled through the `HWBRK_RANGE define located in the "openMSP430_defines.v" file.		 olivier.girard 5279d 10h /
56 Update Design Compiler Synthesis scripts. olivier.girard 5283d 16h /
55 Add a "sandbox" test pattern to play around with the simulation :-P olivier.girard 5284d 11h /
54 Update FPGA projects with the combinatorial loop fixed. olivier.girard 5284d 14h /
53 Fixed the following combinatorial timing loop:
1- irq_detect (omsp_frontend)
2- decode (omsp_frontend)
3- dbg_swbrk (omsp_dbg)
4- halt_flag_set (omsp_dbg)
6- dbg_halt_cmd (omsp_dbg)
7- irq_detect (omsp_frontend)

Without this fix, problem could occur whenever an IRQ request arrives during a software breakpoint instruction fetch.		 olivier.girard 5284d 14h /
52 Re-add pdf documentation. olivier.girard 5289d 10h /
51 Re-add open-office documentation. olivier.girard 5289d 10h /
50 Re-add html documentation. olivier.girard 5289d 10h /
49 Temporar documentation removal because of broken SVN update. olivier.girard 5289d 10h /
48 Re-add html documentation. olivier.girard 5289d 10h /
47 Temporar documentation removal because of broken SVN update. olivier.girard 5289d 10h /
46 Re-add html documentation. olivier.girard 5289d 10h /
45 Temporar documentation removal because of broken SVN update. olivier.girard 5289d 10h /
44 Update documentation with the "Integration and Connectivity" section. olivier.girard 5289d 11h /
43 Re-add documentation (earlier pdf was broken). olivier.girard 5313d 10h /
42 olivier.girard 5313d 10h /

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