OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] - Rev 61

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
61 The build directory should not be part of the SVN configuration. jeremybennett 5303d 21h /
60 Mark Jarvin's patches to support Mac OS X (Snow Leopard). jeremybennett 5310d 14h /
59 Toolchain install script gcc patch change and gdb configure change julius 5331d 15h /
58 ORPSoC2 update - added fpu and implemented in processor, also some sw tests for it, makefile for event sims cleaned up julius 5334d 13h /
57 ORPSoC execution logs created by event sim and cycle accurate should now be equivalent. Changed some of the rule names in orpsoc main makefile to make all rules use hyphens instead of underscores between words julius 5339d 17h /
56 adding generic pll model to orpsoc julius 5347d 20h /
55 Added modelsim support to makefile. Moved buffer libraries to sensible place. Removed a lot of junk julius 5350d 10h /
54 wb_conbus wishbone arbiter now in orpsocv2 instead of synthesized netlist julius 5360d 17h /
53 Fixed incorrect commandline option for ORPSoC and main makefile setting julius 5378d 18h /
52 ORPSoC update - ability to dump part or all of SRAM contents at the end of simulation julius 5379d 14h /
51 ORPSoCv2 updates: cycle accurate profiling, ELF loading julius 5393d 16h /
50 Adding or32_funcs.S julius 5393d 20h /
49 Lots of ORPSoC Updates. Cycle accurate model update. Enabled block read from CPU via debug interface. SMII interface same as devboard but may be broken in sim now. Makefile update julius 5412d 10h /
48 Adds an initialization to keep GCC happy in jp1_ll_read_jp1. jeremybennett 5412d 13h /
47 debug proxy speed increase, block transfers possible with cpu aslong as dbg_interface has appropriate change, usb chip reinit function, changed some of the retry code in the usb transfer functions julius 5421d 21h /
46 debug interfaces now support byte and non-aligned accesses from gdb julius 5427d 21h /
45 Orpsoc eth test fix and script error message update julius 5434d 21h /
44 New SystemC model monitoring functions, ethernet PHY model and test sw, smii decoder for ethernet PHY, various makefile upgrades julius 5463d 20h /
43 Couple of fixes to ORPSoC, new linux patch version in toolchain script julius 5487d 17h /
42 Fixed ORPSoCv2 VCD dumping and UART output in cycleaccurate model julius 5503d 14h /
41 Update to or1k top julius 5506d 16h /
40 Added GDB server to verilog simulation via VPI and make target to build and run this model julius 5507d 21h /
39 Adding OR debug proxy a makefile tweak for uClibc and toolchain install script update julius 5511d 21h /
38 Adding binutils, gcc, uClibc patched source and patches julius 5521d 21h /
37 Update to the toolchain script - uses gcc-core package now instead of complete gcc julius 5521d 21h /
36 Better clean rule in makefile julius 5521d 22h /
35 Download and patch files with README files updated to explain what is in the new repository jeremybennett 5522d 15h /
34 Created directories for download and patch files and added README's explaining what is in each one. jeremybennett 5522d 15h /
33 version 2.1 of GDB 6.8 for the OpenRISC architecture jeremybennett 5522d 15h /
32 Tags directory for versions of GDB 6.8 jeremybennett 5522d 15h /

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.