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Rev Log message Author Age Path
1011 Removed some commented RTL. Fixed SR/ESR flag bug. lampret 7982d 19h /
1010 Import ivang 7986d 22h /
1009 Import ivang 7986d 23h /
1008 Import ivang 7986d 23h /
1007 Import ivang 7986d 23h /
1006 Import ivang 7987d 00h /
1005 Import ivang 7987d 00h /
1004 Now every ramdisk image should have init program. simons 7987d 08h /
1003 cuc temporary files are deleted upon exiting markom 7987d 08h /
1002 Now every ramdisk image should have init program. simons 7987d 08h /
1001 fixed load/store state machine verilog generation errors markom 7987d 08h /
1000 IC/DC cache enable routines fixed. simons 7987d 09h /
999 Now every ramdisk image should have init program. simons 7987d 10h /
998 added missing fout initialization markom 7987d 12h /
997 PRINTF should be used instead of printf; command redirection repaired markom 7987d 13h /
996 some minor bugs fixed markom 7988d 11h /
995 This commit was manufactured by cvs2svn to create tag 'rel_3'. 7988d 19h /
994 Store buffer has been tested and it works. BY default it is still disabled until uClinux confirms correct operation on FPGA board. lampret 7988d 19h /
993 Fixed IMMU bug. lampret 7988d 19h /
992 A bug when cache enabled and bus error comes fixed. simons 7989d 04h /
991 Different memory controller. simons 7989d 04h /
990 Test is now complete. simons 7989d 04h /
989 c++ is making problems so, for now, it is excluded. simons 7990d 12h /
988 ORP architecture supported. simons 7991d 03h /
987 ORP architecture supported. simons 7991d 11h /
986 outputs out of function are not registered anymore markom 7991d 11h /
985 DTLB translation doesn't work on or1ksim when IC/DC enabled. lampret 7991d 23h /
984 Disable SB until it is tested lampret 7991d 23h /
983 First checkin lampret 7992d 01h /
982 Moved to sim/bin lampret 7992d 01h /

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