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Rev Log message Author Age Path
1630 *** empty log message *** jcastillo 6781d 20h /
1629 First Import of uClinux for RC20x board jcastillo 6781d 20h /
1628 First Import of uClinux for RC20x board jcastillo 6781d 20h /
1627 First Import of RC20x uClinux jcastillo 6781d 20h /
1626 First Import of uClinux for RC20x board jcastillo 6781d 20h /
1625 First Import of uClinux for RC20x board jcastillo 6781d 20h /
1624 First Import of uClinux for RC20x board jcastillo 6781d 21h /
1623 First Import of uClinux for RC20x board jcastillo 6781d 21h /
1622 First Import of uClinux for RC20x board jcastillo 6781d 21h /
1621 First Impot jcastillo 6781d 22h /
1620 Added SMC91C111 LAN Chip Interruption to work with uClinux jcastillo 6786d 18h /
1619 Fixed types in function declaration jcastillo 6786d 23h /
1618 Import of or32 sepcific part of binutils port updated by Balint and Nog phoenix 6787d 06h /
1617 *** empty log message *** phoenix 6787d 06h /
1616 Import of or32 sepcific part of binutils port updated by Balint and Nog phoenix 6787d 06h /
1615 *** empty log message *** phoenix 6787d 06h /
1614 CI should not be set in dMMU translation tables or one gets different behaviour with dMMU on or off in case data cache is enabled. care should be taken for addresses higher than 0x7fff_ffff where the situation is just reversed. (since or1200 does not cache upper half of address space if there is no dMMU) phoenix 6797d 06h /
1613 change default phoenix 6802d 16h /
1612 major optimizations for or32 target phoenix 6802d 16h /
1611 This commit was manufactured by cvs2svn to create tag 'stable_0_2_0_rc2'. 6805d 17h /
1610 Update ChangeLog nogj 6805d 17h /
1609 0.2.0-rc2 release nogj 6805d 18h /
1608 Avoid scheduleing too many jobs, potentially underflowing the scheduler stack nogj 6806d 12h /
1607 Don't drop cycles from the scheduler nogj 6806d 12h /
1606 fix uninitialized reads phoenix 6806d 17h /
1605 Execute l.ff1 instruction nogj 6813d 12h /
1604 Fix dumphex/dumpverilog to not do unaligned memory access nogj 6813d 12h /
1603 Accept EM_OPENRISC as a valid machine nogj 6814d 17h /
1602 Corrected description of l.sfXXui (arch manual had a wrong description compared to behavior implemented in or1ksim/gcc/or1200). Removed Atomicity chapter. lampret 6815d 15h /
1601 fixed description of l.sfXXXi lampret 6815d 15h /

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